From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
To: Andrew Murray <andrew.murray@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
mbrugger@suse.com, maz@kernel.org, phil@raspberrypi.org,
linux-kernel@vger.kernel.org, jeremy.linton@arm.com,
Eric Anholt <eric@anholt.net>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
bcm-kernel-feedback-list@broadcom.com,
Stefan Wahren <wahrenst@gmx.net>,
james.quinlan@broadcom.com, linux-pci@vger.kernel.org,
Bjorn Helgaas <bhelgaas@google.com>,
linux-arm-kernel@lists.infradead.org,
linux-rpi-kernel@lists.infradead.org
Subject: Re: [PATCH v3 5/7] PCI: brcmstb: add MSI capability
Date: Mon, 02 Dec 2019 10:59:36 +0100 [thread overview]
Message-ID: <2820f3fb9abc69d54df0dee1b6233eaf3cb63834.camel@suse.de> (raw)
In-Reply-To: <20191129154629.GF43905@e119886-lin.cambridge.arm.com>
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Hi Andrew,
On Fri, 2019-11-29 at 15:46 +0000, Andrew Murray wrote:
> On Tue, Nov 26, 2019 at 10:19:43AM +0100, Nicolas Saenz Julienne wrote:
> > From: Jim Quinlan <james.quinlan@broadcom.com>
> >
> > This adds MSI support to the Broadcom STB PCIe host controller. The MSI
> > controller is physically located within the PCIe block, however, there
> > is no reason why the MSI controller could not be moved elsewhere in the
> > future. MSIX is not supported by the HW.
> >
> > Since the internal Brcmstb MSI controller is intertwined with the PCIe
> > controller, it is not its own platform device but rather part of the
> > PCIe platform device.
> >
> > Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
> > Co-developed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> > Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
> > Reviewed-by: Marc Zyngier <maz@kernel.org>
> >
> > ---
> >
> > Changes since v2 (kept Marc's Reviewed-by as changes didn't affect irq
> > subsystem stuff or seem petty enough):
> > - Use standard APIs on register operations
> > - Get rid of revision code
>
> Do any RPI4's have a HW revision of less than 33?
No, IIRC it's actually revision 34. I had left that bit of code in, following
the same train of thought as with the of_data on the device-tree part of the
driver: "It's harmless and should make accomodating other devices easier." It
turned out not to be such a great approach. Lesson's learned. So I decided to
remove it.
> > - Update rules to msi_target_addr selection
> > - Remove unwarranted MSI_FLAG_PCI_MSIX
> > - Small cosmetic changes
> >
> > Changes since v1:cuando tenías tu vacaciones?
> > - Move revision code and some registers to this patch
> > - Use PCIE_MSI_IRQ_DOMAIN in Kconfig
> > - Remove redundant register read from ISR
> > - Fail probe on MSI init error
> > - Get rid of msi_internal
> > - Use bitmap family of functions
> > - Use edge triggered setup
> > - Add comment regarding MultiMSI
> > - Simplify compose_msi_msg to avoid reg read
> >
> > This is based on Jim's original submission[1] with some slight changes
> > regarding how pcie->msi_target_addr is decided.
> >
> > [1] https://patchwork.kernel.org/patch/10605955/
> >
> > drivers/pci/controller/Kconfig | 1 +
> > drivers/pci/controller/pcie-brcmstb.c | 261 +++++++++++++++++++++++++-
> > 2 files changed, 261 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
> > index 27504f108ee5..918e283bbff1 100644
> > +
> > +static void brcm_msi_compose_msi_msg(struct irq_data *data, struct msi_msg
> > *msg)
> > +{
> > + struct brcm_msi *msi = irq_data_get_irq_chip_data(data);
> > +
> > + msg->address_lo = lower_32_bits(msi->target_addr);
> > + msg->address_hi = upper_32_bits(msi->target_addr);
> > + msg->data = 0x6540 | data->hwirq;
>
> NIT: Perhaps this 0x6540 can be a define - just in the same way we have a
> define
> for PCIE_MISC_MSI_DATA_CONFIG_VAL.
Noted
Regards,
Nicolas
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next prev parent reply other threads:[~2019-12-02 10:00 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-26 9:19 [PATCH v3 0/7] Raspberry Pi 4 PCIe support Nicolas Saenz Julienne
2019-11-26 9:19 ` [PATCH v3 1/7] linux/log2.h: Add roundup/rounddown_pow_two64() family of functions Nicolas Saenz Julienne
2019-11-26 12:51 ` Leon Romanovsky
2019-11-27 18:06 ` Robin Murphy
2019-11-27 18:24 ` Nicolas Saenz Julienne
2019-11-27 19:06 ` Robin Murphy
2019-11-27 19:12 ` Leon Romanovsky
2019-11-27 19:16 ` Nicolas Saenz Julienne
2019-11-27 17:36 ` Nicolas Saenz Julienne
2019-11-26 9:19 ` [PATCH v3 2/7] dt-bindings: PCI: Add bindings for brcmstb's PCIe device Nicolas Saenz Julienne
2019-12-02 16:39 ` Rob Herring
2019-11-26 9:19 ` [PATCH v3 3/7] ARM: dts: bcm2711: Enable PCIe controller Nicolas Saenz Julienne
2019-11-26 9:37 ` Phil Elwell
2019-11-26 9:43 ` Nicolas Saenz Julienne
2019-11-26 9:19 ` [PATCH v3 4/7] PCI: brcmstb: add Broadcom STB PCIe host controller driver Nicolas Saenz Julienne
2019-12-02 15:01 ` Andrew Murray
2019-12-02 15:49 ` Jim Quinlan
2019-12-03 16:31 ` Jeremy Linton
2019-12-03 16:48 ` Robin Murphy
2019-12-03 17:23 ` Nicolas Saenz Julienne
2019-11-26 9:19 ` [PATCH v3 5/7] PCI: brcmstb: add MSI capability Nicolas Saenz Julienne
2019-11-29 15:46 ` Andrew Murray
2019-12-02 9:59 ` Nicolas Saenz Julienne [this message]
2019-12-02 12:20 ` Andrew Murray
2019-12-02 12:22 ` Nicolas Saenz Julienne
2019-11-26 9:19 ` [PATCH v3 7/7] arm64: defconfig: Enable Broadcom's STB PCIe controller Nicolas Saenz Julienne
2019-11-26 21:50 ` [PATCH v3 0/7] Raspberry Pi 4 PCIe support Bjorn Helgaas
2019-11-27 17:28 ` Nicolas Saenz Julienne
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