Re: [PATCH v7 00/15] coresight: Add new API to allocate trace source ID values

[Suzuki K Poulose <suzuki.poulose@arm.com>]

Hi Arnaldo

On 24/01/2023 11:36, Suzuki K Poulose wrote:
> Hi Arnaldo
> 
> Gentle ping.
> 
> On 19/01/2023 12:00, Suzuki K Poulose wrote:
>> Hi Arnaldo,
>>
>> On 16/01/2023 12:49, Mike Leach wrote:
>>> The current method for allocating trace source ID values to sources is
>>> to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 0x10).
>>> The STM is allocated ID 0x1.
>>>
>>> This fixed algorithm is used in both the CoreSight driver code, and by
>>> perf when writing the trace metadata in the AUXTRACE_INFO record.
>>>
>>> The method needs replacing as currently:-
>>> 1. It is inefficient in using available IDs.
>>> 2. Does not scale to larger systems with many cores and the algorithm
>>> has no limits so will generate invalid trace IDs for cpu number > 44.
>>>
>>> Additionally requirements to allocate additional system IDs on some
>>> systems have been seen.
>>>
>>> This patch set  introduces an API that allows the allocation of trace 
>>> IDs
>>> in a dynamic manner.
>>>
>>> Architecturally reserved IDs are never allocated, and the system is
>>> limited to allocating only valid IDs.
>>>
>>> Each of the current trace sources ETM3.x, ETM4.x and STM is updated 
>>> to use
>>> the new API.
>>>
>>> For the ETMx.x devices IDs are allocated on certain events
>>> a) When using sysfs, an ID will be allocated on hardware enable, or a 
>>> read of
>>> sysfs TRCTRACEID register and freed when the sysfs reset is written.
>>>
>>> b) When using perf, ID is allocated on during setup AUX event, and 
>>> freed on
>>> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
>>> The ID allocator is notified when perf sessions start and stop
>>> so CPU based IDs are kept constant throughout any perf session.
>>>
>>>
>>> Note: This patchset breaks some backward compatibility for perf 
>>> record and
>>> perf report.
>>>
>>> The version of the AUXTRACE_INFO has been updated to reflect the fact 
>>> that
>>> the trace source IDs are generated differently. This will
>>> mean older versions of perf report cannot decode the newer file.
>>>
>>> Appies to coresight/next
>>>
> 
> ...
> 
>>> Mike Leach (15):
>>>    coresight: trace-id: Add API to dynamically assign Trace ID values
>>>    coresight: Remove obsolete Trace ID unniqueness checks
>>>    coresight: perf: traceid: Add perf ID allocation and notifiers
>>>    coresight: stm: Update STM driver to use Trace ID API
>>>    coresight: etm4x: Update ETM4 driver to use Trace ID API
>>>    coresight: etm3x: Update ETM3 driver to use Trace ID API
>>>    coresight: etmX.X: stm: Remove trace_id() callback
>>>    coresight: trace id: Remove legacy get trace ID function.
>>>    perf: cs-etm: Move mapping of Trace ID and cpu into helper function
>>>    perf: cs-etm: Update record event to use new Trace ID protocol
>>>    kernel: events: Export perf_report_aux_output_id()
>>>    perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>>>    coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>>>    coresight: trace-id: Add debug & test macros to Trace ID allocation
>>>    coresight: etm3x: docs: Alter sysfs documentation for trace id 
>>> updates
>>
>> I have pushed the kernel patches on this series to coresight tree 
>> next[0].
>>
>> I will be sending them out to Greg for v6.3. Please could you queue the
>> perf tool changes in the series ? i.e., Patches 9,10 and 12.
>>
>>
>> [0] 
>> https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
>>
> 
> Please could you pick up the perf tool changes above ?

Please could you confirm if you are able to queue the perf tool changes 
? Or would you like me route it via coresight tree ?

Kind regards
Suzuki


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