From: "gabriel.fernandez@foss.st.com" <gabriel.fernandez@foss.st.com>
To: Marek Vasut <marex@denx.de>, <linux-arm-kernel@lists.infradead.org>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>,
Christophe Roullier <christophe.roullier@foss.st.com>,
Patrice Chotard <patrice.chotard@foss.st.com>,
Patrick Delaunay <patrick.delaunay@foss.st.com>,
Stephen Boyd <swboyd@chromium.org>, <linux-clk@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH 1/7] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock
Date: Wed, 14 Apr 2021 15:03:36 +0200 [thread overview]
Message-ID: <2b10f5d9-54cb-ce83-b7aa-f4ec8e67c001@foss.st.com> (raw)
In-Reply-To: <20210408185731.135511-2-marex@denx.de>
Hi Marek,
Thanks for the patchset
On 4/8/21 8:57 PM, Marek Vasut wrote:
> The ETHCK_K are modeled as composite clock of MUX and GATE, however per
> STM32MP1 Reference Manual RM0436 Rev 3, Page 574, Figure 83. Peripheral
> clock distribution for Ethernet, ETHPTPDIV divider is attached past the
> ETHCK_K mux, and ETH_CLK/eth_clk_fb clock are output past ETHCKEN gate.
> Therefore, in case ETH_CLK/eth_clk_fb are not in use AND PTP clock are
> in use, ETHCKEN gate can be turned off. Current driver does not permit
> that, fix it.
I don"t understand, it's already the case.
ETHCK_K it's a composite with a MUX and a GATE.
ETHPTP_K (ETHPTPDIV) it's a composite with the same MUX and a DIV (no gate)
If you use only ETHPTPDIV, ETHCKEN gate can be turned off.
> This patch converts ETHCK_K from composite clock into a ETHCKEN gate,
> ETHPTP_K from composite clock into ETHPTPDIV divider, and adds another
> NO_ID clock "ck_ker_eth" which models the ETHSRC mux and is parent clock
> to both ETHCK_K and ETHPTP_K. Therefore, all references to ETHCK_K and
> ETHPTP_K remain functional as before.
>
> [1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574,
> Figure 83. Peripheral clock distribution for Ethernet
> https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf
>
> Signed-off-by: Marek Vasut<marex@denx.de>
> Cc: Alexandre Torgue<alexandre.torgue@foss.st.com>
> Cc: Christophe Roullier<christophe.roullier@foss.st.com>
> Cc: Gabriel Fernandez<gabriel.fernandez@foss.st.com>
> Cc: Patrice Chotard<patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay<patrick.delaunay@foss.st.com>
> Cc: Stephen Boyd<swboyd@chromium.org>
> Cc:linux-clk@vger.kernel.org
> Cc:linux-stm32@st-md-mailman.stormreply.com
> To:linux-arm-kernel@lists.infradead.org
> ---
> drivers/clk/clk-stm32mp1.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
> index a875649df8b8..a7c7f544ee5d 100644
> --- a/drivers/clk/clk-stm32mp1.c
> +++ b/drivers/clk/clk-stm32mp1.c
> @@ -1949,7 +1949,6 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
> KCLK(DSI_K, "dsi_k", dsi_src, 0, G_DSI, M_DSI),
> KCLK(ADFSDM_K, "adfsdm_k", sai_src, 0, G_ADFSDM, M_SAI1),
> KCLK(USBO_K, "usbo_k", usbo_src, 0, G_USBO, M_USBO),
> - KCLK(ETHCK_K, "ethck_k", eth_src, 0, G_ETHCK, M_ETHCK),
>
> /* Particulary Kernel Clocks (no mux or no gate) */
> MGATE_MP1(DFSDM_K, "dfsdm_k", "ck_mcu", 0, G_DFSDM),
> @@ -1958,11 +1957,16 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
> MGATE_MP1(GPU_K, "gpu_k", "pll2_q", 0, G_GPU),
> MGATE_MP1(DAC12_K, "dac12_k", "ck_lsi", 0, G_DAC12),
>
> - COMPOSITE(ETHPTP_K, "ethptp_k", eth_src, CLK_OPS_PARENT_ENABLE |
> + COMPOSITE(NO_ID, "ck_ker_eth", eth_src, CLK_OPS_PARENT_ENABLE |
> CLK_SET_RATE_NO_REPARENT,
> _NO_GATE,
> _MMUX(M_ETHCK),
> - _DIV(RCC_ETHCKSELR, 4, 4, 0, NULL)),
> + _NO_DIV),
> +
> + MGATE_MP1(ETHCK_K, "ethck_k", "ck_ker_eth", 0, G_ETHCK),
assigned parent with ETHCK_K will not work
> +
> + DIV(ETHPTP_K, "ethptp_k", "ck_ker_eth", CLK_OPS_PARENT_ENABLE |
CLK_OPS_PARENT_ENABLE flags not useful with a divider.
best regards
Gabriel
> + CLK_SET_RATE_NO_REPARENT, RCC_ETHCKSELR, 4, 4, 0),
>
> /* RTC clock */
> DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 6, 0),
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-14 13:05 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-08 18:57 [PATCH 0/7] ARM: dts: stm32: clk: Switch ETHRX clock parent from ETHCK_K to MCO2 on DHCOM SoM Marek Vasut
2021-04-08 18:57 ` [PATCH 1/7] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock Marek Vasut
2021-04-14 13:03 ` gabriel.fernandez [this message]
2021-04-14 14:04 ` Marek Vasut
2021-04-16 6:44 ` gabriel.fernandez
2021-04-16 13:47 ` Marek Vasut
2021-04-16 15:23 ` Alexandre TORGUE
2021-04-16 15:31 ` Marek Vasut
2021-04-19 7:46 ` gabriel.fernandez
2022-01-18 22:11 ` Marek Vasut
2021-04-08 18:57 ` [PATCH 2/7] clk: stm32mp1: The dev is always NULL, replace it with np Marek Vasut
2021-04-16 6:44 ` gabriel.fernandez
2021-04-16 13:39 ` Marek Vasut
2021-04-16 14:39 ` Alexandre TORGUE
2021-04-16 14:54 ` Marek Vasut
2021-04-16 15:01 ` Alexandre TORGUE
2021-04-08 18:57 ` [PATCH 3/7] clk: stm32mp1: Register clock with device_node pointer Marek Vasut
2021-04-08 18:57 ` [PATCH 4/7] clk: stm32mp1: Add parent_data to ETHRX clock Marek Vasut
2021-04-08 18:57 ` [PATCH 5/7] ARM: dts: stm32: Add alternate pinmux for ethernet0 pins Marek Vasut
2021-04-08 18:57 ` [PATCH 6/7] ARM: dts: stm32: Add alternate pinmux for mco2 pins Marek Vasut
2021-04-08 18:57 ` [PATCH 7/7] ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM Marek Vasut
2021-04-08 20:32 ` [PATCH 0/7] ARM: dts: stm32: clk: Switch ETHRX clock parent from ETHCK_K to MCO2 on DHCOM SoM Stephen Boyd
2021-04-12 8:09 ` Alexandre TORGUE
2021-04-12 18:44 ` Marek Vasut
2021-04-13 7:48 ` Alexandre TORGUE
2021-04-13 12:05 ` Marek Vasut
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2b10f5d9-54cb-ce83-b7aa-f4ec8e67c001@foss.st.com \
--to=gabriel.fernandez@foss.st.com \
--cc=alexandre.torgue@foss.st.com \
--cc=christophe.roullier@foss.st.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=marex@denx.de \
--cc=patrice.chotard@foss.st.com \
--cc=patrick.delaunay@foss.st.com \
--cc=swboyd@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).