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Mon, 19 Oct 2020 14:04:19 +0100 MIME-Version: 1.0 Date: Mon, 19 Oct 2020 14:04:19 +0100 From: Marc Zyngier To: Vincent Guittot Subject: Re: [PATCH v3 03/16] arm64: Allow IPIs to be handled as normal interrupts In-Reply-To: References: <20200901144324.1071694-1-maz@kernel.org> <20200901144324.1071694-4-maz@kernel.org> User-Agent: Roundcube Webmail/1.4.9 Message-ID: <353f13b0dcc6c7ea1b44012d9632a0cc@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: vincent.guittot@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will@kernel.org, catalin.marinas@arm.com, linux@arm.linux.org.uk, tglx@linutronix.de, jason@lakedaemon.net, sumit.garg@linaro.org, Valentin.Schneider@arm.com, f.fainelli@gmail.com, gregory.clement@bootlin.com, andrew@lunn.ch, saravanak@google.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201019_090422_846427_0A14095F X-CRM114-Status: GOOD ( 22.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sumit Garg , Android Kernel Team , Florian Fainelli , Russell King , Jason Cooper , Saravana Kannan , Andrew Lunn , Catalin Marinas , Gregory Clement , linux-kernel , Thomas Gleixner , Will Deacon , Valentin Schneider , LAK Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Vincent, On 2020-10-19 13:42, Vincent Guittot wrote: > Hi Marc, > > On Tue, 1 Sep 2020 at 16:44, Marc Zyngier wrote: >> >> In order to deal with IPIs as normal interrupts, let's add >> a new way to register them with the architecture code. >> >> set_smp_ipi_range() takes a range of interrupts, and allows >> the arch code to request them as if the were normal interrupts. >> A standard handler is then called by the core IRQ code to deal >> with the IPI. >> >> This means that we don't need to call irq_enter/irq_exit, and >> that we don't need to deal with set_irq_regs either. So let's >> move the dispatcher into its own function, and leave handle_IPI() >> as a compatibility function. >> >> On the sending side, let's make use of ipi_send_mask, which >> already exists for this purpose. >> >> One of the major difference is that we end up, in some cases >> (such as when performing IRQ time accounting on the scheduler >> IPI), end up with nested irq_enter()/irq_exit() pairs. >> Other than the (relatively small) overhead, there should be >> no consequences to it (these pairs are designed to nest >> correctly, and the accounting shouldn't be off). > > While rebasing on mainline, I have faced a performance regression for > the benchmark: > perf bench sched pipe > on my arm64 dual quad core (hikey) and my 2 nodes x 112 CPUS (thx2) > > The regression comes from: > commit: d3afc7f12987 ("arm64: Allow IPIs to be handled as normal > interrupts") That's interesting, as this patch doesn't really change anything (most of the potential overhead comes in later). The only potential overhead I can see is that the scheduler_ipi() call is now wrapped around irq_enter()/irq_exit(). > > v5.9 + this patch > hikey : 48818(+/- 0.31) 37503(+/- 0.15%) -23.2% > thx2 : 132410(+/- 1.72) 122646(+/- 1.92%) -7.4% > > By + this patch, I mean merging branch from this patch. Whereas > merging the previous: > commit: 83cfac95c018 ("genirq: Allow interrupts to be excluded from > /proc/interrupts") > It doesn't show any regression Since you are running perf, can you spot where the overhead occurs? Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel