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[66.29.188.166]) by smtp.gmail.com with ESMTPSA id k38sm29402672pgb.33.2018.12.04.16.11.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Dec 2018 16:11:21 -0800 (PST) Subject: Re: [PATCH v3 0/7] Bring suspend to RAM support to MVEBU SATA To: Miquel Raynal , Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Rob Herring , Mark Rutland , Hans de Goede References: <20181204192831.12440-1-miquel.raynal@bootlin.com> From: Jens Axboe Message-ID: <35c5cdcf-0d89-9236-7937-0c750a781d13@kernel.dk> Date: Tue, 4 Dec 2018 17:11:18 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20181204192831.12440-1-miquel.raynal@bootlin.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181204_161134_281617_2FBDD9FB X-CRM114-Status: GOOD ( 18.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Antoine Tenart , Maxime Chevallier , Nadav Haklai , linux-ide@vger.kernel.org, Thomas Petazzoni , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/4/18 12:28 PM, Miquel Raynal wrote: > Hello, > > As part of an effort to bring suspend to RAM support to Armada 3700 > SoCs (main target: ESPRESSObin), this series handles the work around > the SATA IP. > > First, a change in the libahci platform adds support for the new PHY > framework by following the phy_set_mode()/phy_power_on() > sequence. Then, the AHCI MVEBU driver is a bit updated (patch 2 & 3) > and a missing initialization is added for the A3700 in patch 4 (only > done by the Bootloader before). Missing clock support is implemented > in patch 5 to be sure the clock will be resumed before this driver > (see [1] for the series adding device links to the clock core). > > Finally, device trees are updated to reflect the hardware: the missing > PHY is added to the ESPRESSObin DT, and the clock is added to the SoC > DT (patch 6 & 7). Bindings already document the clock and the PHY so > no update is needed on this regard. Probably the best/easiest to queue this through the libata tree for 4.21. Agree? -- Jens Axboe _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel