From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49C11C433DF for ; Thu, 9 Jul 2020 09:16:11 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 15045206C3 for ; Thu, 9 Jul 2020 09:16:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="qdljQxOH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 15045206C3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=njyzvA+XhIRsBVCqOxdG7hVeW6i6Id29Fvac6MPcgoQ=; b=qdljQxOHiLPtwhRzAxINbCdU/ m/x1Y1AX2dMqW18l0PKpT/bnCqmqLMXSymYBDER0CGs+U6LxdB0GqoUrMQMxTVqetblwoIkwt5MgX XlCPlkkzLFTM3HeC2WoY6tR1WfgWe2rLddlfx0Su6p+PrG2r1wS7U30pZ6CvJ7IvkY1wdG3zRaocA Wj4xoqmyKe40jDbtp5mmoKxEQ4EVq1Tu4IaPpA0PoM/c8RWKy+iE6DtRZKV8DUqx9G/6YSEyE4lIW Z+aa8oYMRR1qHNTFhQHpar8+djQ9ZAJHeTJzQ1Y4jMBTDuumHMtKTaReI9bZ0p9yQrPDsnli+qgEP DieowRO1g==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtSdj-0003Zf-JS; Thu, 09 Jul 2020 09:14:47 +0000 Received: from szxga04-in.huawei.com ([45.249.212.190] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtSdf-0003Wu-3W for linux-arm-kernel@lists.infradead.org; Thu, 09 Jul 2020 09:14:44 +0000 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 19FFA74278D008C4810B; Thu, 9 Jul 2020 17:14:40 +0800 (CST) Received: from [127.0.0.1] (10.174.186.75) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.487.0; Thu, 9 Jul 2020 17:14:29 +0800 Subject: Re: [PATCH v1 2/2] arm64: tlb: Use the TLBI RANGE feature in arm64 To: , , , , , , References: <20200709091054.1698-1-yezhenyu2@huawei.com> <20200709091054.1698-3-yezhenyu2@huawei.com> From: Zhenyu Ye Message-ID: <362990d2-3948-9820-e2d9-aa1ff1c8b068@huawei.com> Date: Thu, 9 Jul 2020 17:14:28 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.3.0 MIME-Version: 1.0 In-Reply-To: <20200709091054.1698-3-yezhenyu2@huawei.com> X-Originating-IP: [10.174.186.75] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200709_051443_453604_DAED749F X-CRM114-Status: GOOD ( 12.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, kuhn.chenqun@huawei.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020/7/9 17:10, Zhenyu Ye wrote: > + /* > + * When cpu does not support TLBI RANGE feature, we flush the tlb > + * entries one by one at the granularity of 'stride'. > + * When cpu supports the TLBI RANGE feature, then: > + * 1. If pages is odd, flush the first page through non-RANGE > + * instruction; > + * 2. For remaining pages: The minimum range granularity is decided > + * by 'scale', so we can not flush all pages by one instruction > + * in some cases. > + * > + * For example, when the pages = 0xe81a, let's start 'scale' from > + * maximum, and find right 'num' for each 'scale': > + * > + * When scale = 3, we can flush no pages because the minumum > + * range is 2^(5*3 + 1) = 0x10000. > + * When scale = 2, the minimum range is 2^(5*2 + 1) = 0x800, we can > + * flush 0xe800 pages this time, the num = 0xe800/0x800 - 1 = 0x1c. > + * Remain pages is 0x1a; > + * When scale = 1, the minimum range is 2^(5*1 + 1) = 0x40, no page > + * can be flushed. > + * When scale = 0, we flush the remaining 0x1a pages, the num = > + * 0x1a/0x2 - 1 = 0xd. > + * > + * However, in most scenarios, the pages = 1 when flush_tlb_range() is > + * called. Start from scale = 3 or other proper value (such as scale = > + * ilog2(pages)), will incur extra overhead. > + * So increase 'scale' from 0 to maximum, the flush order is exactly > + * opposite to the example. > + */ The comments may be too long, probably should be moved to commit messages. Thanks, Zhenyu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel