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Received: from mga12.intel.com ([192.55.52.136]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lYvA4-00CLbe-KB for linux-arm-kernel@lists.infradead.org; Tue, 20 Apr 2021 18:31:51 +0000 IronPort-SDR: elKIU+B8s3VVue5yKEXCDqMC3aLPmhofttLpd2kySz7H0FSvGdnMEn2E9tvgifCnCUfBe80p5U x5+Wv2cdrXVw== X-IronPort-AV: E=McAfee;i="6200,9189,9960"; a="175051043" X-IronPort-AV: E=Sophos;i="5.82,237,1613462400"; d="scan'208";a="175051043" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2021 11:31:45 -0700 IronPort-SDR: nI6XlCRoQqyX9gVpSOBF3qh4q1h3IJIBuTQNtvecQ++HW1wKk1jlLPR3I/IZgycW99ThL2Hsw5 c7CHtZTjtZcQ== X-IronPort-AV: E=Sophos;i="5.82,237,1613462400"; d="scan'208";a="427099403" Received: from schen9-mobl.amr.corp.intel.com ([10.212.244.102]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2021 11:31:44 -0700 Subject: Re: [RFC PATCH v5 4/4] scheduler: Add cluster scheduler level for x86 To: "Song Bao Hua (Barry Song)" , "catalin.marinas@arm.com" , "will@kernel.org" , "rjw@rjwysocki.net" , "vincent.guittot@linaro.org" , "bp@alien8.de" , "tglx@linutronix.de" , "mingo@redhat.com" , "lenb@kernel.org" , "peterz@infradead.org" , "dietmar.eggemann@arm.com" , "rostedt@goodmis.org" , "bsegall@google.com" , "mgorman@suse.de" Cc: "msys.mizuma@gmail.com" , "valentin.schneider@arm.com" , "gregkh@linuxfoundation.org" , Jonathan Cameron , "juri.lelli@redhat.com" , "mark.rutland@arm.com" , "sudeep.holla@arm.com" , "aubrey.li@linux.intel.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-acpi@vger.kernel.org" , "x86@kernel.org" , "xuwei (O)" , "Zengtao (B)" , "guodong.xu@linaro.org" , yangyicong , "Liguozhu (Kenneth)" , "linuxarm@openeuler.org" , "hpa@zytor.com" References: <20210319041618.14316-1-song.bao.hua@hisilicon.com> <20210319041618.14316-5-song.bao.hua@hisilicon.com> <110234d1-22ce-8a9a-eabb-c15ac29a5dcd@linux.intel.com> <67cc380019fd40d88d7a493b6cbc0852@hisilicon.com> From: Tim Chen Message-ID: <422b5d06-ec0e-f064-32fe-15df5b2957dd@linux.intel.com> Date: Tue, 20 Apr 2021 11:31:38 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <67cc380019fd40d88d7a493b6cbc0852@hisilicon.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210420_113148_739514_AA1989E1 X-CRM114-Status: GOOD ( 13.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 3/23/21 4:21 PM, Song Bao Hua (Barry Song) wrote: >> >> On 3/18/21 9:16 PM, Barry Song wrote: >>> From: Tim Chen >>> >>> There are x86 CPU architectures (e.g. Jacobsville) where L2 cahce >>> is shared among a cluster of cores instead of being exclusive >>> to one single core. >>> >>> To prevent oversubscription of L2 cache, load should be >>> balanced between such L2 clusters, especially for tasks with >>> no shared data. >>> >>> Also with cluster scheduling policy where tasks are woken up >>> in the same L2 cluster, we will benefit from keeping tasks >>> related to each other and likely sharing data in the same L2 >>> cluster. >>> >>> Add CPU masks of CPUs sharing the L2 cache so we can build such >>> L2 cluster scheduler domain. >>> >>> Signed-off-by: Tim Chen >>> Signed-off-by: Barry Song >> >> >> Barry, >> >> Can you also add this chunk to the patch. >> Thanks. > > Sure, Tim, Thanks. I'll put that into patch 4/4 in v6. > Barry, This chunk will also need to be added to return cluster id for x86. Please add it in your next rev. Thanks. Tim --- diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index 800fa48c9fcd..2548d824f103 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -109,6 +109,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu); #define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id) #define topology_logical_die_id(cpu) (cpu_data(cpu).logical_die_id) #define topology_die_id(cpu) (cpu_data(cpu).cpu_die_id) +#define topology_cluster_id(cpu) (per_cpu(cpu_l2c_id, cpu)) #define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id) extern unsigned int __max_die_per_package; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel