RE: [PATCH v11 5/6] KVM: arm64: ioctl to fetch/store tags in a guest

From: David Laight <David.Laight@ACULAB.COM>
To: 'Steven Price' <steven.price@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
	James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	"Suzuki K Poulose" <suzuki.poulose@arm.com>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Dave Martin <Dave.Martin@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	Juan Quintela <quintela@redhat.com>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Peter Maydell <peter.maydell@linaro.org>,
	Haibo Xu <Haibo.Xu@arm.com>, Andrew Jones <drjones@redhat.com>
Subject: RE: [PATCH v11 5/6] KVM: arm64: ioctl to fetch/store tags in a guest
Date: Fri, 7 May 2021 09:59:27 +0000	[thread overview]
Message-ID: <42fd9c5ceb974be3b2aae5dd288507e8@AcuMS.aculab.com> (raw)
In-Reply-To: <25c85740-0119-549e-6ddb-aea69c5efc76@arm.com>

From: Steven Price <steven.price@arm.com>
> Sent: 07 May 2021 10:45
> 
> On 04/05/2021 18:44, Catalin Marinas wrote:
> > On Thu, Apr 29, 2021 at 05:06:07PM +0100, Steven Price wrote:
> >> On 27/04/2021 18:58, Catalin Marinas wrote:
> >>> On Fri, Apr 16, 2021 at 04:43:08PM +0100, Steven Price wrote:
> >>>> diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h
> >>>> index 24223adae150..2b85a047c37d 100644
> >>>> --- a/arch/arm64/include/uapi/asm/kvm.h
> >>>> +++ b/arch/arm64/include/uapi/asm/kvm.h
> >>>> @@ -184,6 +184,20 @@ struct kvm_vcpu_events {
> >>>>    	__u32 reserved[12];
> >>>>    };
> >>>> +struct kvm_arm_copy_mte_tags {
> >>>> +	__u64 guest_ipa;
> >>>> +	__u64 length;
> >>>> +	union {
> >>>> +		void __user *addr;
> >>>> +		__u64 padding;
> >>>> +	};
> >>>> +	__u64 flags;
> >>>> +	__u64 reserved[2];
> >>>> +};
> > [...]
> >>> Maybe add the two reserved
> >>> values to the union in case we want to store something else in the
> >>> future.
> >>
> >> I'm not sure what you mean here. What would the reserved fields be unioned
> >> with? And surely they are no longer reserved in that case?
> >
> > In case you want to keep the structure size the same for future
> > expansion and the expansion only happens via the union, you'd add some
> > padding in there just in case. We do this for struct siginfo with an
> > _si_pad[] array in the union.
> >
> 
> Ah I see what you mean. In this case "padding" is just a sizer to ensure
> that flags is always the same alignment - it's not intended to be used.
> As I noted previously though it's completely pointless as this only on
> arm64 and even 32 bit Arm would naturally align the following __u64.

It is nice to be explicit though.
You also have the problem that a 32bit (LE) application would leave the
high bits of the user address undefined.

All moot and pointless if 64bit only though.

	David

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