From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60FEDC33CB1 for ; Fri, 17 Jan 2020 12:52:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2BAE22073A for ; Fri, 17 Jan 2020 12:52:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="YiAq0/88" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2BAE22073A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1BrZcMTISYxPkaaTh4sCTwxnU4Z9piL2twE0GfxekOQ=; b=YiAq0/885M9BXo x1hr60F7L8UZFuTA+Hpi7jw9sT0yBcqSAUUPRIH0iZrPsChdyfavzKqZldA0KkRqc9h8ER5Rid5Ao fazchlulL9uc0O0eoIcZPWl0CS1/knPGiR836gYT2nks2SdbcwlPlrrVRwmwx8iA7/y6Z6boDtNGu 3Yz1OYncwGy4C1v00qnPz5EBMq9Sb5UOYkMCmMz5wDk8H50TodHde/bAC0q63mzM/iPXILxOncaX/ moGL7B6G5zjehpfoFqmVj3Xky+dUZ63uBfpvkfZeWUdUnHAIhRAfAo/I9ktKXuMeQM8Fl08y1FBgW 38XVGcguQ2gt6GrM85qw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1isR6o-00035e-H4; Fri, 17 Jan 2020 12:52:18 +0000 Received: from mail-out.m-online.net ([212.18.0.9]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1isR6V-0002tj-TW for linux-arm-kernel@lists.infradead.org; Fri, 17 Jan 2020 12:52:04 +0000 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 47zgtk59CRz1qr52; Fri, 17 Jan 2020 13:51:58 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 47zgtk4PpKz1qr2t; Fri, 17 Jan 2020 13:51:58 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id mBdATS5piZ_T; Fri, 17 Jan 2020 13:51:55 +0100 (CET) X-Auth-Info: ASIDq01xbleKDbEZYVbIlffotAIIJKuG9OekEcuVGg8= Received: from [IPv6:::1] (unknown [195.140.253.167]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Fri, 17 Jan 2020 13:51:55 +0100 (CET) Subject: Re: [PATCH] ARM: dts: stm32: Add DH Electronics DHCOM SoM and PDK2 board To: Patrick DELAUNAY , "linux-arm-kernel@lists.infradead.org" , Maxime Coquelin , Alexandre TORGUE References: <20200115094714.154581-1-marex@denx.de> <2881f2b053b04d718eba35e61f7b5403@SFHDAG6NODE3.st.com> From: Marek Vasut Message-ID: <435364e8-9737-58ab-1497-f532f57af65d@denx.de> Date: Fri, 17 Jan 2020 13:51:39 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <2881f2b053b04d718eba35e61f7b5403@SFHDAG6NODE3.st.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200117_045200_258631_18516149 X-CRM114-Status: GOOD ( 20.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrice CHOTARD , "linux-stm32@st-md-mailman.stormreply.com" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/15/20 5:46 PM, Patrick DELAUNAY wrote: > Hi Marek; Hi, > Adds the Linux Maintainers for STM32M linux patch: Added, if there is a need for V2. (no further comments below) [...] > > Hi Alexandre, > > Can you review this patch. > > Regards > > Patrick > >> -----Original Message----- >> From: Marek Vasut >> Sent: mercredi 15 janvier 2020 10:47 >> To: linux-arm-kernel@lists.infradead.org >> Cc: Marek Vasut ; Patrick DELAUNAY >> ; Patrice CHOTARD >> Subject: [PATCH] ARM: dts: stm32: Add DH Electronics DHCOM SoM and PDK2 >> board >> Importance: High >> >> Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier board. >> This is an SoM with STM32MP157C and an evaluation kit. The baseboard >> provides Ethernet, UART, USB, CAN and optional display. >> >> Signed-off-by: Marek Vasut >> Cc: Patrick Delaunay >> Cc: Patrice Chotard >> --- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts | 351 ++++++++++++++++++ >> arch/arm/boot/dts/stm32mp157c-dhcom-som.dtsi | 368 +++++++++++++++++++ >> 3 files changed, 720 insertions(+) >> create mode 100644 arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts >> create mode 100644 arch/arm/boot/dts/stm32mp157c-dhcom-som.dtsi >> >> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index >> e006fef77499..c8a9f0c44f34 100644 >> --- a/arch/arm/boot/dts/Makefile >> +++ b/arch/arm/boot/dts/Makefile >> @@ -1019,6 +1019,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ >> stm32h743i-disco.dtb \ >> stm32mp157a-avenger96.dtb \ >> stm32mp157a-dk1.dtb \ >> + stm32mp157c-dhcom-pdk2.dtb \ >> stm32mp157c-dk2.dtb \ >> stm32mp157c-ed1.dtb \ >> stm32mp157c-ev1.dtb >> diff --git a/arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts >> b/arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts >> new file mode 100644 >> index 000000000000..0199301994ae >> --- /dev/null >> +++ b/arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts >> @@ -0,0 +1,351 @@ >> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause >> +/* >> + * Copyright (C) 2020 Marek Vasut */ >> + >> +#include "stm32mp157c-dhcom-som.dtsi" >> +#include >> + >> +/ { >> + model = "STMicroelectronics STM32MP157C DHCOM Premium >> Developer Kit (2)"; >> + compatible = "dh,stm32mp157c-dhcom-pdk2", "st,stm32mp157"; >> + >> + aliases { >> + serial0 = &uart4; >> + serial1 = &usart3; >> + serial2 = &uart8; >> + ethernet0 = ðernet0; >> + }; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; >> + >> + clk_ext_audio_codec: clock-codec { >> + compatible = "fixed-clock"; >> + #clock-cells = <0>; >> + clock-frequency = <24000000>; >> + }; >> + >> + display_bl: display-bl { >> + compatible = "pwm-backlight"; >> + pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>; >> + brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>; >> + default-brightness-level = <8>; >> + enable-gpios = <&gpioi 0 GPIO_ACTIVE_HIGH>; >> + status = "okay"; >> + }; >> + >> + ethernet_vio: vioregulator { >> + compatible = "regulator-fixed"; >> + regulator-name = "vio"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + gpio = <&gpiog 3 GPIO_ACTIVE_LOW>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + panel { >> + compatible = "edt,etm0700g0edh6"; >> + backlight = <&display_bl>; >> + >> + port { >> + lcd_panel_in: endpoint { >> + remote-endpoint = <&lcd_display_out>; >> + }; >> + }; >> + }; >> + >> + sound { >> + compatible = "audio-graph-card"; >> + routing = >> + "MIC_IN", "Capture", >> + "Capture", "Mic Bias", >> + "Playback", "HP_OUT"; >> + dais = <&sai2a_port &sai2b_port>; >> + status = "okay"; >> + }; >> +}; >> + >> +&cec { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&cec_pins_a>; >> + status = "okay"; >> +}; >> + >> +ðernet0 { >> + status = "okay"; >> + pinctrl-0 = <ðernet0_rmii_pins_a>; >> + pinctrl-1 = <ðernet0_rmii_pins_sleep_a>; >> + pinctrl-names = "default", "sleep"; >> + phy-mode = "rmii"; >> + max-speed = <100>; >> + phy-handle = <&phy0>; >> + st,eth-ref-clk-sel; >> + phy-reset-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>; >> + >> + mdio0 { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + compatible = "snps,dwmac-mdio"; >> + >> + phy0: ethernet-phy@1 { >> + reg = <1>; >> + }; >> + }; >> +}; >> + >> +&i2c5 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&i2c5_pins_a>; >> + i2c-scl-rising-time-ns = <185>; >> + i2c-scl-falling-time-ns = <20>; >> + status = "okay"; >> + /* spare dmas for other usage */ >> + /delete-property/dmas; >> + /delete-property/dma-names; >> + >> + sgtl5000: codec@a { >> + compatible = "fsl,sgtl5000"; >> + reg = <0x0a>; >> + #sound-dai-cells = <0>; >> + clocks = <&clk_ext_audio_codec>; >> + VDDA-supply = <&v3v3>; >> + VDDIO-supply = <&vdd>; >> + >> + sgtl5000_port: port { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + sgtl5000_tx_endpoint: endpoint@0 { >> + reg = <0>; >> + remote-endpoint = <&sai2a_endpoint>; >> + frame-master; >> + bitclock-master; >> + }; >> + >> + sgtl5000_rx_endpoint: endpoint@1 { >> + reg = <1>; >> + remote-endpoint = <&sai2b_endpoint>; >> + frame-master; >> + bitclock-master; >> + }; >> + }; >> + >> + }; >> + >> + polytouch@38 { >> + compatible = "edt,edt-ft5x06"; >> + reg = <0x38>; >> + interrupt-parent = <&gpiog>; >> + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ >> + linux,wakeup; >> + }; >> +}; >> + >> +<dc { >> + pinctrl-names = "default", "sleep"; >> + pinctrl-0 = <<dc_pins_b>; >> + pinctrl-1 = <<dc_pins_sleep_b>; >> + status = "okay"; >> + >> + port { >> + lcd_display_out: endpoint { >> + remote-endpoint = <&lcd_panel_in>; >> + }; >> + }; >> +}; >> + >> +&m_can1 { >> + pinctrl-names = "default", "sleep"; >> + pinctrl-0 = <&m_can1_pins_a>; >> + pinctrl-1 = <&m_can1_sleep_pins_a>; >> + status = "okay"; >> +}; >> + >> +&pinctrl { >> + ethernet0_rmii_pins_a: rmii-0 { >> + pins1 { >> + pinmux = , /* >> ETH1_RMII_TXD0 */ >> + , /* >> ETH1_RMII_TXD1 */ >> + , /* >> ETH1_RMII_TX_EN */ >> + , /* >> ETH1_RMII_REF_CLK */ >> + , /* ETH1_MDIO >> */ >> + ; /* ETH1_MDC >> */ >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <2>; >> + }; >> + pins2 { >> + pinmux = , /* >> ETH1_RMII_RXD0 */ >> + , /* >> ETH1_RMII_RXD1 */ >> + ; /* >> ETH1_RMII_CRS_DV */ >> + bias-disable; >> + }; >> + }; >> + >> + ethernet0_rmii_pins_sleep_a: rmii-sleep-0 { >> + pins1 { >> + pinmux = , /* >> ETH1_RMII_TXD0 */ >> + , /* >> ETH1_RMII_TXD1 */ >> + , /* >> ETH1_RMII_TX_EN */ >> + , /* >> ETH1_MDIO */ >> + , /* >> ETH1_MDC */ >> + , /* >> ETH1_RMII_RXD0 */ >> + , /* >> ETH1_RMII_RXD1 */ >> + , /* >> ETH1_RMII_REF_CLK */ >> + ; /* >> ETH1_RMII_CRS_DV */ >> + }; >> + }; >> + >> + sai2_pins_a: sai2-0 { >> + pins1 { >> + pinmux = , /* >> SAI2_SD_A */ >> + , /* >> SAI2_FS_A */ >> + ; /* >> SAI2_SCK_A */ >> + slew-rate = <0>; >> + drive-push-pull; >> + bias-disable; >> + }; >> + pins2 { >> + pinmux = ; /* >> SAI2_SD_B */ >> + bias-disable; >> + }; >> + }; >> + >> + sai2_sleep_pins_a: sai2-sleep-0 { >> + pins { >> + pinmux = , /* >> SAI2_SD_A */ >> + , /* >> SAI2_FS_A */ >> + , /* >> SAI2_SCK_A */ >> + ; /* >> SAI2_SD_B */ >> + }; >> + }; >> + >> + usart3_pins_a: usart3-0 { >> + pins1 { >> + pinmux = ; /* >> USART3_TX */ >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <0>; >> + }; >> + pins2 { >> + pinmux = ; /* >> USART3_RX */ >> + bias-disable; >> + }; >> + }; >> + >> + uart8_pins_a: uart8-0 { >> + pins1 { >> + pinmux = ; /* UART8_TX */ >> + bias-disable; >> + drive-push-pull; >> + slew-rate = <0>; >> + }; >> + pins2 { >> + pinmux = ; /* UART8_RX >> */ >> + bias-disable; >> + }; >> + }; >> +}; >> + >> +&sai2 { >> + clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>; >> + clock-names = "pclk", "x8k", "x11k"; >> + pinctrl-names = "default", "sleep"; >> + pinctrl-0 = <&sai2_pins_a>; >> + pinctrl-1 = <&sai2_sleep_pins_a>; >> + status = "okay"; >> + >> + sai2a: audio-controller@4400b004 { >> + #clock-cells = <0>; >> + dma-names = "tx"; >> + clocks = <&rcc SAI2_K>; >> + clock-names = "sai_ck"; >> + status = "okay"; >> + >> + sai2a_port: port { >> + sai2a_endpoint: endpoint { >> + remote-endpoint = <&sgtl5000_tx_endpoint>; >> + format = "i2s"; >> + mclk-fs = <512>; >> + dai-tdm-slot-num = <2>; >> + dai-tdm-slot-width = <16>; >> + }; >> + }; >> + }; >> + >> + sai2b: audio-controller@4400b024 { >> + dma-names = "rx"; >> + st,sync = <&sai2a 2>; >> + clocks = <&rcc SAI2_K>, <&sai2a>; >> + clock-names = "sai_ck", "MCLK"; >> + status = "okay"; >> + >> + sai2b_port: port { >> + sai2b_endpoint: endpoint { >> + remote-endpoint = <&sgtl5000_rx_endpoint>; >> + format = "i2s"; >> + mclk-fs = <512>; >> + dai-tdm-slot-num = <2>; >> + dai-tdm-slot-width = <16>; >> + }; >> + }; >> + }; >> +}; >> + >> +&timers2 { >> + /* spare dmas for other usage (un-delete to enable pwm capture) */ >> + /delete-property/dmas; >> + /delete-property/dma-names; >> + status = "okay"; >> + pwm2: pwm { >> + pinctrl-0 = <&pwm2_pins_a>; >> + pinctrl-names = "default"; >> + status = "okay"; >> + }; >> + timer@1 { >> + status = "okay"; >> + }; >> +}; >> + >> +&usart3 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&usart3_pins_a>; >> + status = "okay"; >> +}; >> + >> +&uart8 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&uart8_pins_a>; >> + status = "okay"; >> +}; >> + >> +&usbh_ehci { >> + phys = <&usbphyc_port0>; >> + status = "okay"; >> +}; >> + >> +&usbotg_hs { >> + dr_mode = "peripheral"; >> + phys = <&usbphyc_port1 0>; >> + phy-names = "usb2-phy"; >> + status = "okay"; >> +}; >> + >> +&usbphyc { >> + status = "okay"; >> +}; >> + >> +&usbphyc_port0 { >> + phy-supply = <&vdd_usb>; >> + vdda1v1-supply = <®11>; >> + vdda1v8-supply = <®18>; >> +}; >> + >> +&usbphyc_port1 { >> + phy-supply = <&vdd_usb>; >> + vdda1v1-supply = <®11>; >> + vdda1v8-supply = <®18>; >> +}; >> diff --git a/arch/arm/boot/dts/stm32mp157c-dhcom-som.dtsi >> b/arch/arm/boot/dts/stm32mp157c-dhcom-som.dtsi >> new file mode 100644 >> index 000000000000..54579ea2dd2e >> --- /dev/null >> +++ b/arch/arm/boot/dts/stm32mp157c-dhcom-som.dtsi >> @@ -0,0 +1,368 @@ >> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) >> +/* >> + * Copyright (C) 2020 Marek Vasut */ /dts-v1/; >> + >> +#include "stm32mp157.dtsi" >> +#include "stm32mp15xc.dtsi" >> +#include "stm32mp15-pinctrl.dtsi" >> +#include "stm32mp15xxaa-pinctrl.dtsi" >> +#include >> +#include >> + >> +/ { >> + memory@c0000000 { >> + device_type = "memory"; >> + reg = <0xC0000000 0x40000000>; >> + }; >> + >> + reserved-memory { >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges; >> + >> + mcuram2: mcuram2@10000000 { >> + compatible = "shared-dma-pool"; >> + reg = <0x10000000 0x40000>; >> + no-map; >> + }; >> + >> + vdev0vring0: vdev0vring0@10040000 { >> + compatible = "shared-dma-pool"; >> + reg = <0x10040000 0x1000>; >> + no-map; >> + }; >> + >> + vdev0vring1: vdev0vring1@10041000 { >> + compatible = "shared-dma-pool"; >> + reg = <0x10041000 0x1000>; >> + no-map; >> + }; >> + >> + vdev0buffer: vdev0buffer@10042000 { >> + compatible = "shared-dma-pool"; >> + reg = <0x10042000 0x4000>; >> + no-map; >> + }; >> + >> + mcuram: mcuram@30000000 { >> + compatible = "shared-dma-pool"; >> + reg = <0x30000000 0x40000>; >> + no-map; >> + }; >> + >> + retram: retram@38000000 { >> + compatible = "shared-dma-pool"; >> + reg = <0x38000000 0x10000>; >> + no-map; >> + }; >> + }; >> +}; >> + >> +&adc { >> + vdd-supply = <&vdd>; >> + vdda-supply = <&vdda>; >> + vref-supply = <&vdda>; >> + status = "okay"; >> + >> + adc1: adc@0 { >> + st,min-sample-time-nsecs = <5000>; >> + st,adc-channels = <0>; >> + status = "okay"; >> + }; >> + >> + adc2: adc@100 { >> + st,adc-channels = <1>; >> + st,min-sample-time-nsecs = <5000>; >> + status = "okay"; >> + }; >> +}; >> + >> +&dac { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; >> + vref-supply = <&vdda>; >> + status = "okay"; >> + >> + dac1: dac@1 { >> + status = "okay"; >> + }; >> + dac2: dac@2 { >> + status = "okay"; >> + }; >> +}; >> + >> +&dts { >> + status = "okay"; >> +}; >> + >> +&gpu { >> + status = "okay"; >> +}; >> + >> +&i2c4 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&i2c4_pins_a>; >> + i2c-scl-rising-time-ns = <185>; >> + i2c-scl-falling-time-ns = <20>; >> + status = "okay"; >> + /* spare dmas for other usage */ >> + /delete-property/dmas; >> + /delete-property/dma-names; >> + >> + rtc@32 { >> + compatible = "microcrystal,rv8803"; >> + reg = <0x32>; >> + }; >> + >> + pmic: stpmic@33 { >> + compatible = "st,stpmic1"; >> + reg = <0x33>; >> + interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + status = "okay"; >> + >> + regulators { >> + compatible = "st,stpmic1-regulators"; >> + ldo1-supply = <&v3v3>; >> + ldo2-supply = <&v3v3>; >> + ldo3-supply = <&vdd_ddr>; >> + ldo5-supply = <&v3v3>; >> + ldo6-supply = <&v3v3>; >> + pwr_sw1-supply = <&bst_out>; >> + pwr_sw2-supply = <&bst_out>; >> + >> + vddcore: buck1 { >> + regulator-name = "vddcore"; >> + regulator-min-microvolt = <800000>; >> + regulator-max-microvolt = <1350000>; >> + regulator-always-on; >> + regulator-initial-mode = <0>; >> + regulator-over-current-protection; >> + }; >> + >> + vdd_ddr: buck2 { >> + regulator-name = "vdd_ddr"; >> + regulator-min-microvolt = <1350000>; >> + regulator-max-microvolt = <1350000>; >> + regulator-always-on; >> + regulator-initial-mode = <0>; >> + regulator-over-current-protection; >> + }; >> + >> + vdd: buck3 { >> + regulator-name = "vdd"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-always-on; >> + st,mask-reset; >> + regulator-initial-mode = <0>; >> + regulator-over-current-protection; >> + }; >> + >> + v3v3: buck4 { >> + regulator-name = "v3v3"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-always-on; >> + regulator-over-current-protection; >> + regulator-initial-mode = <0>; >> + }; >> + >> + vdda: ldo1 { >> + regulator-name = "vdda"; >> + regulator-min-microvolt = <2900000>; >> + regulator-max-microvolt = <2900000>; >> + interrupts = ; >> + }; >> + >> + v2v8: ldo2 { >> + regulator-name = "v2v8"; >> + regulator-min-microvolt = <2800000>; >> + regulator-max-microvolt = <2800000>; >> + interrupts = ; >> + }; >> + >> + vtt_ddr: ldo3 { >> + regulator-name = "vtt_ddr"; >> + regulator-min-microvolt = <500000>; >> + regulator-max-microvolt = <750000>; >> + regulator-always-on; >> + regulator-over-current-protection; >> + }; >> + >> + vdd_usb: ldo4 { >> + regulator-name = "vdd_usb"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + interrupts = ; >> + }; >> + >> + vdd_sd: ldo5 { >> + regulator-name = "vdd_sd"; >> + regulator-min-microvolt = <2900000>; >> + regulator-max-microvolt = <2900000>; >> + interrupts = ; >> + regulator-boot-on; >> + }; >> + >> + v1v8: ldo6 { >> + regulator-name = "v1v8"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + interrupts = ; >> + }; >> + >> + vref_ddr: vref_ddr { >> + regulator-name = "vref_ddr"; >> + regulator-always-on; >> + regulator-over-current-protection; >> + }; >> + >> + bst_out: boost { >> + regulator-name = "bst_out"; >> + interrupts = ; >> + }; >> + >> + vbus_otg: pwr_sw1 { >> + regulator-name = "vbus_otg"; >> + interrupts = ; >> + }; >> + >> + vbus_sw: pwr_sw2 { >> + regulator-name = "vbus_sw"; >> + interrupts = ; >> + regulator-active-discharge; >> + }; >> + }; >> + >> + onkey { >> + compatible = "st,stpmic1-onkey"; >> + interrupts = , ; >> + interrupt-names = "onkey-falling", "onkey-rising"; >> + power-off-time-sec = <10>; >> + status = "okay"; >> + }; >> + >> + watchdog { >> + compatible = "st,stpmic1-wdt"; >> + status = "disabled"; >> + }; >> + }; >> + >> + touchscreen@49 { >> + compatible = "ti,tsc2004"; >> + reg = <0x49>; >> + vio-supply = <&v3v3>; >> + interrupts-extended = <&gpioh 3 IRQ_TYPE_EDGE_FALLING>; >> + }; >> + >> + eeprom@50 { >> + compatible = "atmel,24c02"; >> + reg = <0x50>; >> + pagesize = <16>; >> + }; >> +}; >> + >> +&ipcc { >> + status = "okay"; >> +}; >> + >> +&iwdg2 { >> + timeout-sec = <32>; >> + status = "okay"; >> +}; >> + >> +&m4_rproc { >> + memory-region = <&retram>, <&mcuram>, <&mcuram2>, >> <&vdev0vring0>, >> + <&vdev0vring1>, <&vdev0buffer>; >> + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; >> + mbox-names = "vq0", "vq1", "shutdown"; >> + interrupt-parent = <&exti>; >> + interrupts = <68 1>; >> + status = "okay"; >> +}; >> + >> +&pwr_regulators { >> + vdd-supply = <&vdd>; >> + vdd_3v3_usbfs-supply = <&vdd_usb>; >> +}; >> + >> +&rng1 { >> + status = "okay"; >> +}; >> + >> +&rtc { >> + status = "okay"; >> +}; >> + >> +&sdmmc1 { >> + pinctrl-names = "default", "opendrain", "sleep"; >> + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; >> + pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; >> + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; >> + broken-cd; >> + st,sig-dir; >> + st,neg-edge; >> + st,use-ckin; >> + bus-width = <4>; >> + vmmc-supply = <&vdd_sd>; >> + status = "okay"; >> +}; >> + >> +&sdmmc2 { >> + pinctrl-names = "default", "opendrain", "sleep"; >> + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; >> + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; >> + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; >> + non-removable; >> + no-sd; >> + no-sdio; >> + st,neg-edge; >> + bus-width = <8>; >> + vmmc-supply = <&v3v3>; >> + vqmmc-supply = <&v3v3>; >> + mmc-ddr-3_3v; >> + status = "okay"; >> +}; >> + >> +&sdmmc3 { >> + pinctrl-names = "default", "opendrain", "sleep"; >> + pinctrl-0 = <&sdmmc3_b4_pins_a>; >> + pinctrl-1 = <&sdmmc3_b4_od_pins_a>; >> + pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; >> + broken-cd; >> + st,neg-edge; >> + bus-width = <4>; >> + vmmc-supply = <&v3v3>; >> + vqmmc-supply = <&v3v3>; >> + mmc-ddr-3_3v; >> + status = "okay"; >> +}; >> + >> +&qspi { >> + pinctrl-names = "default", "sleep"; >> + pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>; >> + pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a >> &qspi_bk2_sleep_pins_a>; >> + reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + status = "okay"; >> + >> + flash0: mx66l51235l@0 { >> + compatible = "jedec,spi-nor"; >> + reg = <0>; >> + spi-rx-bus-width = <4>; >> + spi-max-frequency = <108000000>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + }; >> +}; >> + >> +&uart4 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&uart4_pins_a>; >> + status = "okay"; >> +}; >> -- >> 2.24.1 > -- Best regards, Marek Vasut _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel