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Fri, 19 Mar 2021 16:51:56 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lNILo-007ki0-0S for linux-arm-kernel@lists.infradead.org; Fri, 19 Mar 2021 16:51:53 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A1A3C61942; Fri, 19 Mar 2021 16:51:48 +0000 (UTC) Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94) (envelope-from ) id 1lNILi-002f1c-HM; Fri, 19 Mar 2021 16:51:46 +0000 MIME-Version: 1.0 Date: Fri, 19 Mar 2021 16:51:46 +0000 From: Marc Zyngier To: Mark Brown Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, Will Deacon , Catalin Marinas , James Morse , Julien Thierry , Suzuki K Poulose , ascull@google.com, qperret@google.com, kernel-team@android.com Subject: Re: [PATCH v2 05/11] arm64: sve: Provide a conditional update accessor for ZCR_ELx In-Reply-To: <20210319164236.GH5619@sirena.org.uk> References: <20210318122532.505263-1-maz@kernel.org> <20210318122532.505263-6-maz@kernel.org> <20210319164236.GH5619@sirena.org.uk> User-Agent: Roundcube Webmail/1.4.11 Message-ID: <45a7868d83eaaef2e5d0f6e730c9c8f2@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: broonie@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, dave.martin@arm.com, daniel.kiss@arm.com, will@kernel.org, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, ascull@google.com, qperret@google.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210319_165152_247390_C7FBD4A1 X-CRM114-Status: GOOD ( 15.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2021-03-19 16:42, Mark Brown wrote: > On Thu, Mar 18, 2021 at 12:25:26PM +0000, Marc Zyngier wrote: > >> A common pattern is to conditionally update ZCR_ELx in order >> to avoid the "self-synchronizing" effect that writing to this >> register has. >> >> Let's provide an accessor that does exactly this. > > Reviewed-by: Mark Brown > >> +#define sve_cond_update_zcr_vq(val, reg) \ >> + do { \ >> + u64 __zcr = read_sysreg_s((reg)); \ >> + u64 __new = __zcr & ~ZCR_ELx_LEN_MASK; \ >> + __new |= (val) & ZCR_ELx_LEN_MASK; \ >> + if (__zcr != __new) \ >> + write_sysreg_s(__new, (reg)); \ >> + } while (0) >> + > > Do compilers actually do much better with this than with a static > inline like the other functions in this header? Seems like something > they should be figuring out. It's not about performance or anything of the sort: in most cases where we end-up using this, it is on the back of an exception. So performance is the least of our worries. However, the "reg" parameter to read/write_sysreg_s() cannot be a variable, because it is directly fed to the assembler. If you want to use functions, you need to specialise them per register. At this point, I'm pretty happy with a #define. M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel