From: Andrey Konovalov <andreyknvl@google.com>
To: Andrew Morton <akpm@linux-foundation.org>
Cc: linux-arm-kernel@lists.infradead.org,
Marco Elver <elver@google.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Will Deacon <will.deacon@arm.com>,
Branislav Rankov <Branislav.Rankov@arm.com>,
kasan-dev@googlegroups.com, linux-kernel@vger.kernel.org,
linux-mm@kvack.org, Alexander Potapenko <glider@google.com>,
Evgenii Stepanov <eugenis@google.com>,
Andrey Konovalov <andreyknvl@google.com>,
Andrey Ryabinin <aryabinin@virtuozzo.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Dmitry Vyukov <dvyukov@google.com>
Subject: [PATCH mm v11 30/42] arm64: mte: Switch GCR_EL1 in kernel entry and exit
Date: Mon, 23 Nov 2020 21:07:54 +0100 [thread overview]
Message-ID: <578b03294708cc7258fad0dc9c2a2e809e5a8214.1606161801.git.andreyknvl@google.com> (raw)
In-Reply-To: <cover.1606161801.git.andreyknvl@google.com>
From: Vincenzo Frascino <vincenzo.frascino@arm.com>
When MTE is present, the GCR_EL1 register contains the tags mask that
allows to exclude tags from the random generation via the IRG instruction.
With the introduction of the new Tag-Based KASAN API that provides a
mechanism to reserve tags for special reasons, the MTE implementation
has to make sure that the GCR_EL1 setting for the kernel does not affect
the userspace processes and viceversa.
Save and restore the kernel/user mask in GCR_EL1 in kernel entry and exit.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Co-developed-by: Andrey Konovalov <andreyknvl@google.com>
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
---
Change-Id: I0081cba5ace27a9111bebb239075c9a466af4c84
---
arch/arm64/include/asm/mte-def.h | 1 -
arch/arm64/include/asm/mte-kasan.h | 5 ++++
arch/arm64/include/asm/mte.h | 2 ++
arch/arm64/kernel/asm-offsets.c | 3 +++
arch/arm64/kernel/entry.S | 41 ++++++++++++++++++++++++++++++
arch/arm64/kernel/mte.c | 31 +++++++++++++++++++---
6 files changed, 79 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/mte-def.h b/arch/arm64/include/asm/mte-def.h
index 8401ac5840c7..2d73a1612f09 100644
--- a/arch/arm64/include/asm/mte-def.h
+++ b/arch/arm64/include/asm/mte-def.h
@@ -10,6 +10,5 @@
#define MTE_TAG_SHIFT 56
#define MTE_TAG_SIZE 4
#define MTE_TAG_MASK GENMASK((MTE_TAG_SHIFT + (MTE_TAG_SIZE - 1)), MTE_TAG_SHIFT)
-#define MTE_TAG_MAX (MTE_TAG_MASK >> MTE_TAG_SHIFT)
#endif /* __ASM_MTE_DEF_H */
diff --git a/arch/arm64/include/asm/mte-kasan.h b/arch/arm64/include/asm/mte-kasan.h
index 71ff6c6786ac..26349a4b5e2e 100644
--- a/arch/arm64/include/asm/mte-kasan.h
+++ b/arch/arm64/include/asm/mte-kasan.h
@@ -30,6 +30,7 @@ u8 mte_get_random_tag(void);
void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag);
void mte_enable_kernel(void);
+void mte_init_tags(u64 max_tag);
#else /* CONFIG_ARM64_MTE */
@@ -55,6 +56,10 @@ static inline void mte_enable_kernel(void)
{
}
+static inline void mte_init_tags(u64 max_tag)
+{
+}
+
#endif /* CONFIG_ARM64_MTE */
#endif /* __ASSEMBLY__ */
diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h
index cf1cd181dcb2..d02aff9f493d 100644
--- a/arch/arm64/include/asm/mte.h
+++ b/arch/arm64/include/asm/mte.h
@@ -18,6 +18,8 @@
#include <asm/pgtable-types.h>
+extern u64 gcr_kernel_excl;
+
void mte_clear_page_tags(void *addr);
unsigned long mte_copy_tags_from_user(void *to, const void __user *from,
unsigned long n);
diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index 7d32fc959b1a..dfe6ed8446ac 100644
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -47,6 +47,9 @@ int main(void)
#ifdef CONFIG_ARM64_PTR_AUTH
DEFINE(THREAD_KEYS_USER, offsetof(struct task_struct, thread.keys_user));
DEFINE(THREAD_KEYS_KERNEL, offsetof(struct task_struct, thread.keys_kernel));
+#endif
+#ifdef CONFIG_ARM64_MTE
+ DEFINE(THREAD_GCR_EL1_USER, offsetof(struct task_struct, thread.gcr_user_excl));
#endif
BLANK();
DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 6f31c2c06788..2f4dca656b34 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -173,6 +173,43 @@ alternative_else_nop_endif
#endif
.endm
+ .macro mte_set_gcr, tmp, tmp2
+#ifdef CONFIG_ARM64_MTE
+ /*
+ * Calculate and set the exclude mask preserving
+ * the RRND (bit[16]) setting.
+ */
+ mrs_s \tmp2, SYS_GCR_EL1
+ bfi \tmp2, \tmp, #0, #16
+ msr_s SYS_GCR_EL1, \tmp2
+ isb
+#endif
+ .endm
+
+ .macro mte_set_kernel_gcr, tmp, tmp2
+#ifdef CONFIG_KASAN_HW_TAGS
+alternative_if_not ARM64_MTE
+ b 1f
+alternative_else_nop_endif
+ ldr_l \tmp, gcr_kernel_excl
+
+ mte_set_gcr \tmp, \tmp2
+1:
+#endif
+ .endm
+
+ .macro mte_set_user_gcr, tsk, tmp, tmp2
+#ifdef CONFIG_ARM64_MTE
+alternative_if_not ARM64_MTE
+ b 1f
+alternative_else_nop_endif
+ ldr \tmp, [\tsk, #THREAD_GCR_EL1_USER]
+
+ mte_set_gcr \tmp, \tmp2
+1:
+#endif
+ .endm
+
.macro kernel_entry, el, regsize = 64
.if \regsize == 32
mov w0, w0 // zero upper 32 bits of x0
@@ -212,6 +249,8 @@ alternative_else_nop_endif
ptrauth_keys_install_kernel tsk, x20, x22, x23
+ mte_set_kernel_gcr x22, x23
+
scs_load tsk, x20
.else
add x21, sp, #S_FRAME_SIZE
@@ -330,6 +369,8 @@ alternative_else_nop_endif
/* No kernel C function calls after this as user keys are set. */
ptrauth_keys_install_user tsk, x0, x1, x2
+ mte_set_user_gcr tsk, x0, x1
+
apply_ssbd 0, x0, x1
.endif
diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c
index 6a7adb986b52..02d508391ec7 100644
--- a/arch/arm64/kernel/mte.c
+++ b/arch/arm64/kernel/mte.c
@@ -23,6 +23,8 @@
#include <asm/ptrace.h>
#include <asm/sysreg.h>
+u64 gcr_kernel_excl __ro_after_init;
+
static void mte_sync_page_tags(struct page *page, pte_t *ptep, bool check_swap)
{
pte_t old_pte = READ_ONCE(*ptep);
@@ -129,6 +131,26 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag)
return ptr;
}
+void mte_init_tags(u64 max_tag)
+{
+ static bool gcr_kernel_excl_initialized;
+
+ if (!gcr_kernel_excl_initialized) {
+ /*
+ * The format of the tags in KASAN is 0xFF and in MTE is 0xF.
+ * This conversion extracts an MTE tag from a KASAN tag.
+ */
+ u64 incl = GENMASK(FIELD_GET(MTE_TAG_MASK >> MTE_TAG_SHIFT,
+ max_tag), 0);
+
+ gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK;
+ gcr_kernel_excl_initialized = true;
+ }
+
+ /* Enable the kernel exclude mask for random tags generation. */
+ write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1);
+}
+
void mte_enable_kernel(void)
{
/* Enable MTE Sync Mode for EL1. */
@@ -171,7 +193,11 @@ static void update_gcr_el1_excl(u64 excl)
static void set_gcr_el1_excl(u64 excl)
{
current->thread.gcr_user_excl = excl;
- update_gcr_el1_excl(excl);
+
+ /*
+ * SYS_GCR_EL1 will be set to current->thread.gcr_user_excl value
+ * by mte_set_user_gcr() in kernel_exit,
+ */
}
void flush_mte_state(void)
@@ -197,7 +223,6 @@ void mte_thread_switch(struct task_struct *next)
/* avoid expensive SCTLR_EL1 accesses if no change */
if (current->thread.sctlr_tcf0 != next->thread.sctlr_tcf0)
update_sctlr_el1_tcf0(next->thread.sctlr_tcf0);
- update_gcr_el1_excl(next->thread.gcr_user_excl);
}
void mte_suspend_exit(void)
@@ -205,7 +230,7 @@ void mte_suspend_exit(void)
if (!system_supports_mte())
return;
- update_gcr_el1_excl(current->thread.gcr_user_excl);
+ update_gcr_el1_excl(gcr_kernel_excl);
}
long set_mte_ctrl(struct task_struct *task, unsigned long arg)
--
2.29.2.454.gaff20da3a2-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-11-23 20:22 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-23 20:07 [PATCH mm v11 00/42] kasan: add hardware tag-based mode for arm64 Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 01/42] kasan: drop unnecessary GPL text from comment headers Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 02/42] kasan: KASAN_VMALLOC depends on KASAN_GENERIC Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 03/42] kasan: group vmalloc code Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 04/42] kasan: shadow declarations only for software modes Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 05/42] kasan: rename (un)poison_shadow to (un)poison_range Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 06/42] kasan: rename KASAN_SHADOW_* to KASAN_GRANULE_* Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 07/42] kasan: only build init.c for software modes Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 08/42] kasan: split out shadow.c from common.c Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 09/42] kasan: define KASAN_MEMORY_PER_SHADOW_PAGE Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 10/42] kasan: rename report and tags files Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 11/42] kasan: don't duplicate config dependencies Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 12/42] kasan: hide invalid free check implementation Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 13/42] kasan: decode stack frame only with KASAN_STACK_ENABLE Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 14/42] kasan, arm64: only init shadow for software modes Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 15/42] kasan, arm64: only use kasan_depth " Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 16/42] kasan, arm64: move initialization message Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 17/42] kasan, arm64: rename kasan_init_tags and mark as __init Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 18/42] kasan: rename addr_has_shadow to addr_has_metadata Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 19/42] kasan: rename print_shadow_for_address to print_memory_metadata Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 20/42] kasan: rename SHADOW layout macros to META Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 21/42] kasan: separate metadata_fetch_row for each mode Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 22/42] kasan, arm64: don't allow SW_TAGS with ARM64_MTE Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 23/42] kasan: introduce CONFIG_KASAN_HW_TAGS Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 24/42] arm64: Enable armv8.5-a asm-arch option Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 25/42] arm64: mte: Add in-kernel MTE helpers Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 26/42] arm64: mte: Reset the page tag in page->flags Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 27/42] arm64: mte: Add in-kernel tag fault handler Andrey Konovalov
2020-12-03 10:26 ` Catalin Marinas
2020-12-03 10:39 ` Vincenzo Frascino
2020-11-23 20:07 ` [PATCH mm v11 28/42] arm64: kasan: Allow enabling in-kernel MTE Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 29/42] arm64: mte: Convert gcr_user into an exclude mask Andrey Konovalov
2020-11-23 20:07 ` Andrey Konovalov [this message]
2020-11-23 20:07 ` [PATCH mm v11 31/42] kasan, mm: untag page address in free_reserved_area Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 32/42] arm64: kasan: Align allocations for HW_TAGS Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 33/42] arm64: kasan: Add arch layer for memory tagging helpers Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 34/42] kasan: define KASAN_GRANULE_SIZE for HW_TAGS Andrey Konovalov
2020-11-23 20:07 ` [PATCH mm v11 35/42] kasan, x86, s390: update undef CONFIG_KASAN Andrey Konovalov
2020-11-23 20:08 ` [PATCH mm v11 36/42] kasan, arm64: expand CONFIG_KASAN checks Andrey Konovalov
2020-11-23 20:08 ` [PATCH mm v11 37/42] kasan, arm64: implement HW_TAGS runtime Andrey Konovalov
2020-11-23 20:08 ` [PATCH mm v11 38/42] kasan, arm64: print report from tag fault handler Andrey Konovalov
2020-11-23 20:08 ` [PATCH mm v11 39/42] kasan, mm: reset tags when accessing metadata Andrey Konovalov
2020-11-23 20:08 ` [PATCH mm v11 40/42] kasan, arm64: enable CONFIG_KASAN_HW_TAGS Andrey Konovalov
2020-11-23 20:08 ` [PATCH mm v11 41/42] kasan: add documentation for hardware tag-based mode Andrey Konovalov
2020-11-23 20:08 ` [PATCH mm v11 42/42] kselftest/arm64: Check GCR_EL1 after context switch Andrey Konovalov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=578b03294708cc7258fad0dc9c2a2e809e5a8214.1606161801.git.andreyknvl@google.com \
--to=andreyknvl@google.com \
--cc=Branislav.Rankov@arm.com \
--cc=akpm@linux-foundation.org \
--cc=aryabinin@virtuozzo.com \
--cc=catalin.marinas@arm.com \
--cc=dvyukov@google.com \
--cc=elver@google.com \
--cc=eugenis@google.com \
--cc=glider@google.com \
--cc=kasan-dev@googlegroups.com \
--cc=kevin.brodsky@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=vincenzo.frascino@arm.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).