From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59304C433E2 for ; Wed, 16 Sep 2020 01:46:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D972D20936 for ; Wed, 16 Sep 2020 01:46:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="DtxhjCAq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D972D20936 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=hisilicon.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=WNBXIb3P38493X+XxCs8y9fweB/AqoETinxHSMa9EEs=; b=DtxhjCAqNqiM9LjRNQj2wekch cWpqB+lrKMP68MCjT8M5wwnRCuUq5455axJpZDla9NEnstPsKi2NXh+ulucesgeagAswUCJewTFCh gUEGMzoybdgr0JB4GIW4MBPbwCb+cxvX7BIbfOMJastvY6ElPSBS00+/6kGKOm3M6h3urRliYyjkj wn9CJxsiX5+4v/eN0K7lCBSV7lD+2LDBRp4w0PrEOK47oUebBE+h6kl9+I3Ua4/Agknp2ZWfDKmut 0RuAHD+6OBASVr7ekW7hURGkRTusoiIWmrTxDhGjyhZKtubKMSpcDqggdcdgrBx0g38LkxUjdl6lF mYZmIFFIA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kIMVk-0005xm-1j; Wed, 16 Sep 2020 01:45:28 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kIMVg-0005wE-UL for linux-arm-kernel@lists.infradead.org; Wed, 16 Sep 2020 01:45:25 +0000 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id BBF4DC145AD14191E557; Wed, 16 Sep 2020 09:45:21 +0800 (CST) Received: from [10.57.101.250] (10.57.101.250) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.487.0; Wed, 16 Sep 2020 09:45:20 +0800 Subject: Re: [PATCH v3 4/6] arm64: dts: hisilicon: Fix SP805 clocks List-Id: To: Andre Przywara , References: <20200907121831.242281-1-andre.przywara@arm.com> <20200907121831.242281-5-andre.przywara@arm.com> From: Wei Xu Message-ID: <5F616E30.3090705@hisilicon.com> Date: Wed, 16 Sep 2020 09:45:20 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <20200907121831.242281-5-andre.przywara@arm.com> X-Originating-IP: [10.57.101.250] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200915_214525_222472_5E5CCD5C X-CRM114-Status: GOOD ( 15.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Chanho Min , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Andre, On 2020/9/7 20:18, Andre Przywara wrote: > The SP805 DT binding requires two clocks to be specified, but > Hisilicon platform DTs currently only specify one clock. > > In practice, Linux would pick a clock named "apb_pclk" for the bus > clock, and the Linux and U-Boot SP805 driver would use the first clock > to derive the actual watchdog counter frequency. > > Since currently both are the very same clock, we can just double the > clock reference, and add the correct clock-names, to match the binding. > > Signed-off-by: Andre Przywara Thanks! Applied to the hisilicon arm64 dt tree. Best Regards, Wei > --- > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 10 ++++++---- > arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 5 +++-- > 2 files changed, 9 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > index d25aac5e0bf8..994140fbc916 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -1089,16 +1089,18 @@ > compatible = "arm,sp805-wdt", "arm,primecell"; > reg = <0x0 0xe8a06000 0x0 0x1000>; > interrupts = ; > - clocks = <&crg_ctrl HI3660_OSC32K>; > - clock-names = "apb_pclk"; > + clocks = <&crg_ctrl HI3660_OSC32K>, > + <&crg_ctrl HI3660_OSC32K>; > + clock-names = "wdog_clk", "apb_pclk"; > }; > > watchdog1: watchdog@e8a07000 { > compatible = "arm,sp805-wdt", "arm,primecell"; > reg = <0x0 0xe8a07000 0x0 0x1000>; > interrupts = ; > - clocks = <&crg_ctrl HI3660_OSC32K>; > - clock-names = "apb_pclk"; > + clocks = <&crg_ctrl HI3660_OSC32K>, > + <&crg_ctrl HI3660_OSC32K>; > + clock-names = "wdog_clk", "apb_pclk"; > }; > > tsensor: tsensor@fff30000 { > diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi > index 3d189d9f0d24..6578f8191d71 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi > @@ -843,8 +843,9 @@ > compatible = "arm,sp805-wdt", "arm,primecell"; > reg = <0x0 0xf8005000 0x0 0x1000>; > interrupts = ; > - clocks = <&ao_ctrl HI6220_WDT0_PCLK>; > - clock-names = "apb_pclk"; > + clocks = <&ao_ctrl HI6220_WDT0_PCLK>, > + <&ao_ctrl HI6220_WDT0_PCLK>; > + clock-names = "wdog_clk", "apb_pclk"; > }; > > tsensor: tsensor@0,f7030700 { > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel