From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 120B1ECAAA1 for ; Fri, 9 Sep 2022 18:31:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=A2jcASFniIj8TuHQXqeTyZ2toEu8cYjo8yjdQQ4M/bA=; b=tc60SMXwhJJIU9 EdPFK4WzC/RO8kWCod417hR+FAnOFm28kpsqhEnEgXAWWjTkopk94KxqXKDPrG+oP/YGWDtuhjgri g9JrT1Dzx0Vi/AXU2aFHDS1FBStKh5AoQS2kAPTmrP0mcF71EwvsgVwU9JkQ6TPSF0nTXDZ2xyebu 3KJSiylY2AjESwG/DxyAOGshkgMs98hLNVchySW5aZKboyH0NBv8a+HCUAmYiaeRwyqjGnb8dd01n BOHGjkg7WtXTTc6FbYIBTQCayoQKD5S/ScrjltyCE4AASr8In45rjc+8NioNd474ZVg4cWLv+QhNN iy2irWBqkILNDj2mHU9w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWilU-001Coq-D2; Fri, 09 Sep 2022 18:30:08 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oWilQ-001Cmk-Ls for linux-arm-kernel@lists.infradead.org; Fri, 09 Sep 2022 18:30:06 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4026B165C; Fri, 9 Sep 2022 11:30:05 -0700 (PDT) Received: from [10.57.15.197] (unknown [10.57.15.197]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9D6353F73D; Fri, 9 Sep 2022 11:29:56 -0700 (PDT) Message-ID: <5aad4afe-bf1e-42aa-49c7-f1a2481960fa@arm.com> Date: Fri, 9 Sep 2022 19:29:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH 0/3] arm64: errata: remove BF16 HWCAP due to incorrect result on Cortex-A510 Content-Language: en-GB To: James Morse , linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Suzuki K Poulose , Will Deacon References: <20220909165938.3931307-1-james.morse@arm.com> From: Robin Murphy In-Reply-To: <20220909165938.3931307-1-james.morse@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220909_113004_794506_6904CDBD X-CRM114-Status: GOOD ( 22.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2022-09-09 17:59, James Morse wrote: > Hello! > > Cortex-A510 has an erratum where the BFMMLA or VMMLA instructions might > produce the incorrect result. This only happens if two Cortex-A510 CPUs > are configured by the SoC manafacturer in a particular way to share some > hardware, and are using it at the same time. It isn't possible for linux > to know how the CPUs were configured, so the only option is to disable > the BF16 feature for all Cortex-A510 CPUs. Hmm, the TRM doesn't seem to describe any obvious restrictions on accessing IMP_CPUCFR_EL1 - is there some other nefarious secret at play there? Robin. > This won't stop user-space from trying to use the instructions to see > if they work - but such software is already broken on big/little systems > with mismathed features. > > Removing the BF16 feature involves removing both the HWCAP, as was done > by commit 44b3834b2eed "arm64: errata: Remove AES hwcap for COMPAT tasks", > and the emulated view of that register that user-space has. > (This wasn't previously needed as aarch32 ID registers aren't accessible > like this). > > As there are now two of these things, this series tries to add a more > maintainable way to remove features, to avoid spilling workaround like > this into cpufeature.c. > > Instead, cpu_errata.c modifies the user_mask that is used for emulation > of the id registers, and cpufeature.c builds the HWCAPs based on this. > > I have patches to convert the AES workaround to do the same, but that > should wait until the aarch32 ID registers are generated by the sysreg > awk scripts (it needs some new masks defined). > > [0] https://developer.arm.com/documentation/SDEN1873351/1400/?lang=en > > Thanks, > > James Morse (3): > arm64: cpufeature: Force HWCAP to be based on the sysreg visible to > user-space > arm64: cpufeature: Expose get_arm64_ftr_reg() outside cpufeature.c > arm64: errata: remove BF16 HWCAP due to incorrect result on > Cortex-A510 > > Documentation/arm64/silicon-errata.rst | 2 ++ > arch/arm64/Kconfig | 14 +++++++++ > arch/arm64/include/asm/cpufeature.h | 2 ++ > arch/arm64/kernel/cpu_errata.c | 27 ++++++++++++++++ > arch/arm64/kernel/cpufeature.c | 43 ++++++++++++++++++++------ > arch/arm64/tools/cpucaps | 1 + > 6 files changed, 79 insertions(+), 10 deletions(-) > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel