* [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board
@ 2021-03-31 20:42 Alain Volmat
2021-03-31 20:42 ` [PATCH v3 01/13] ARM: dts: sti: update flexgen compatible within stih418-clock Alain Volmat
` (12 more replies)
0 siblings, 13 replies; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
This serie introduces the 4KOpen (stih418-b2264) board based
on a stih418 soc. Since it is the first board to use the spi-fsm
SPI NOR controller available since stih407, the controller is
also added within the stih407-family DT.
It also contains a fix within the stih418 DT since the rng11 is not
available on this platform and is thus disabled.
sti dts updates related to clocks are also added within the serie in
order to use new sti clock driver compatible to avoid
having to declare clock output names within the device-tree.
Those 9 patches were initially pushed together with the clock driver
updates but have been pulled out of that serie to only push the driver
updates via the clock tree. [1]
For that reason, this serie should be applied on top of the serie
[clk: st: embed clock outputs within drivers].
[1] https://lore.kernel.org/linux-clk/161706966003.3012082.13602640109563561014@swboyd.mtv.corp.google.com/
Alain Volmat (13):
ARM: dts: sti: update flexgen compatible within stih418-clock
ARM: dts: sti: update flexgen compatible within stih407-clock
ARM: dts: sti: update flexgen compatible within stih410-clock
ARM: dts: sti: update clkgen-pll entries in stih407-clock
ARM: dts: sti: update clkgen-pll entries in stih410-clock
ARM: dts: sti: update clkgen-pll entries in stih418-clock
ARM: dts: sti: update clkgen-fsyn entries in stih407-clock
ARM: dts: sti: update clkgen-fsyn entries in stih410-clock
ARM: dts: sti: update clkgen-fsyn entries in stih418-clock
ARM: dts: sti: add the spinor controller node within stih407-family
ARM: dts: sti: disable rng11 on the stih418 platform
ARM: dts: sti: add the thermal sensor node within stih418
ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board
v3: update of the stih418-b2264 dts
addition of stih407/stih410/stih418 clock updates
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/stih407-clock.dtsi | 128 ++--------------------
arch/arm/boot/dts/stih407-family.dtsi | 15 +++
arch/arm/boot/dts/stih410-clock.dtsi | 138 ++---------------------
arch/arm/boot/dts/stih418-b2264.dts | 151 ++++++++++++++++++++++++++
arch/arm/boot/dts/stih418-clock.dtsi | 136 ++---------------------
arch/arm/boot/dts/stih418.dtsi | 12 ++
7 files changed, 215 insertions(+), 368 deletions(-)
create mode 100644 arch/arm/boot/dts/stih418-b2264.dts
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v3 01/13] ARM: dts: sti: update flexgen compatible within stih418-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:03 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 02/13] ARM: dts: sti: update flexgen compatible within stih407-clock Alain Volmat
` (11 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih418-clock.dtsi | 96 ++--------------------------
1 file changed, 5 insertions(+), 91 deletions(-)
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index 8fa092462102..35d12979cdf4 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -83,15 +83,12 @@
};
clk_s_a0_flexgen: clk-s-a0-flexgen {
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih410-a0";
#clock-cells = <1>;
clocks = <&clk_s_a0_pll 0>,
<&clk_sysin>;
-
- clock-output-names = "clk-ic-lmi0",
- "clk-ic-lmi1";
};
};
@@ -132,7 +129,7 @@
clk_s_c0_flexgen: clk-s-c0-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih418-c0";
clocks = <&clk_s_c0_pll0 0>,
<&clk_s_c0_pll1 0>,
@@ -142,49 +139,6 @@
<&clk_s_c0_quadfs 3>,
<&clk_sysin>;
- clock-output-names = "clk-icn-gpu",
- "clk-fdma",
- "clk-nand",
- "clk-hva",
- "clk-proc-stfe",
- "clk-tp",
- "clk-rx-icn-dmu",
- "clk-rx-icn-hva",
- "clk-icn-cpu",
- "clk-tx-icn-dmu",
- "clk-mmc-0",
- "clk-mmc-1",
- "clk-jpegdec",
- "clk-icn-reg",
- "clk-proc-bdisp-0",
- "clk-proc-bdisp-1",
- "clk-pp-dmu",
- "clk-vid-dmu",
- "clk-dss-lpc",
- "clk-st231-aud-0",
- "clk-st231-gp-1",
- "clk-st231-dmu",
- "clk-icn-lmi",
- "clk-tx-icn-1",
- "clk-icn-sbc",
- "clk-stfe-frc2",
- "clk-eth-phyref",
- "clk-eth-ref-phyclk",
- "clk-flash-promip",
- "clk-main-disp",
- "clk-aux-disp",
- "clk-compo-dvp",
- "clk-tx-icn-hades",
- "clk-rx-icn-hades",
- "clk-icn-reg-16",
- "clk-pp-hevc",
- "clk-clust-hevc",
- "clk-hwpe-hevc",
- "clk-fc-hevc",
- "clk-proc-mixer",
- "clk-proc-sc",
- "clk-avsp-hevc";
-
/*
* ARM Peripheral clock for timers
*/
@@ -221,20 +175,13 @@
clk_s_d0_flexgen: clk-s-d0-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen-audio", "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih410-d0";
clocks = <&clk_s_d0_quadfs 0>,
<&clk_s_d0_quadfs 1>,
<&clk_s_d0_quadfs 2>,
<&clk_s_d0_quadfs 3>,
<&clk_sysin>;
-
- clock-output-names = "clk-pcm-0",
- "clk-pcm-1",
- "clk-pcm-2",
- "clk-spdiff",
- "clk-pcmr10-master",
- "clk-usb2-phy";
};
};
@@ -257,7 +204,7 @@
clk_s_d2_flexgen: clk-s-d2-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen-video", "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih418-d2";
clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
@@ -266,30 +213,6 @@
<&clk_sysin>,
<&clk_sysin>,
<&clk_tmdsout_hdmi>;
-
- clock-output-names = "clk-pix-main-disp",
- "",
- "",
- "",
- "",
- "clk-tmds-hdmi-div2",
- "clk-pix-aux-disp",
- "clk-denc",
- "clk-pix-hddac",
- "clk-hddac",
- "clk-sddac",
- "clk-pix-dvo",
- "clk-dvo",
- "clk-pix-hdmi",
- "clk-tmds-hdmi",
- "clk-ref-hdmiphy",
- "", "", "", "", "",
- "", "", "", "", "",
- "", "", "", "", "",
- "", "", "", "", "",
- "", "", "", "", "",
- "", "", "", "", "",
- "", "clk-vp9";
};
};
@@ -312,22 +235,13 @@
clk_s_d3_flexgen: clk-s-d3-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih407-d3";
clocks = <&clk_s_d3_quadfs 0>,
<&clk_s_d3_quadfs 1>,
<&clk_s_d3_quadfs 2>,
<&clk_s_d3_quadfs 3>,
<&clk_sysin>;
-
- clock-output-names = "clk-stfe-frc1",
- "clk-tsout-0",
- "clk-tsout-1",
- "clk-mchi",
- "clk-vsens-compo",
- "clk-frc1-remote",
- "clk-lpc-0",
- "clk-lpc-1";
};
};
};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 02/13] ARM: dts: sti: update flexgen compatible within stih407-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
2021-03-31 20:42 ` [PATCH v3 01/13] ARM: dts: sti: update flexgen compatible within stih418-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:03 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 03/13] ARM: dts: sti: update flexgen compatible within stih410-clock Alain Volmat
` (10 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 85 ++--------------------------
1 file changed, 6 insertions(+), 79 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 1ab40db7c91a..ecd568777e5f 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -83,15 +83,12 @@
};
clk_s_a0_flexgen: clk-s-a0-flexgen {
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih407-a0";
#clock-cells = <1>;
clocks = <&clk_s_a0_pll 0>,
<&clk_sysin>;
-
- clock-output-names = "clk-ic-lmi0";
- clock-critical = <CLK_IC_LMI0>;
};
};
@@ -134,7 +131,7 @@
clk_s_c0_flexgen: clk-s-c0-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih407-c0";
clocks = <&clk_s_c0_pll0 0>,
<&clk_s_c0_pll1 0>,
@@ -144,45 +141,6 @@
<&clk_s_c0_quadfs 3>,
<&clk_sysin>;
- clock-output-names = "clk-icn-gpu",
- "clk-fdma",
- "clk-nand",
- "clk-hva",
- "clk-proc-stfe",
- "clk-proc-tp",
- "clk-rx-icn-dmu",
- "clk-rx-icn-hva",
- "clk-icn-cpu",
- "clk-tx-icn-dmu",
- "clk-mmc-0",
- "clk-mmc-1",
- "clk-jpegdec",
- "clk-ext2fa9",
- "clk-ic-bdisp-0",
- "clk-ic-bdisp-1",
- "clk-pp-dmu",
- "clk-vid-dmu",
- "clk-dss-lpc",
- "clk-st231-aud-0",
- "clk-st231-gp-1",
- "clk-st231-dmu",
- "clk-icn-lmi",
- "clk-tx-icn-disp-1",
- "clk-icn-sbc",
- "clk-stfe-frc2",
- "clk-eth-phy",
- "clk-eth-ref-phyclk",
- "clk-flash-promip",
- "clk-main-disp",
- "clk-aux-disp",
- "clk-compo-dvp";
- clock-critical = <CLK_PROC_STFE>,
- <CLK_ICN_CPU>,
- <CLK_TX_ICN_DMU>,
- <CLK_EXT2F_A9>,
- <CLK_ICN_LMI>,
- <CLK_ICN_SBC>;
-
/*
* ARM Peripheral clock for timers
*/
@@ -219,18 +177,13 @@
clk_s_d0_flexgen: clk-s-d0-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen-audio", "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih407-d0";
clocks = <&clk_s_d0_quadfs 0>,
<&clk_s_d0_quadfs 1>,
<&clk_s_d0_quadfs 2>,
<&clk_s_d0_quadfs 3>,
<&clk_sysin>;
-
- clock-output-names = "clk-pcm-0",
- "clk-pcm-1",
- "clk-pcm-2",
- "clk-spdiff";
};
};
@@ -253,7 +206,7 @@
clk_s_d2_flexgen: clk-s-d2-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen-video", "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih407-d2";
clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
@@ -262,24 +215,7 @@
<&clk_sysin>,
<&clk_sysin>,
<&clk_tmdsout_hdmi>;
-
- clock-output-names = "clk-pix-main-disp",
- "clk-pix-pip",
- "clk-pix-gdp1",
- "clk-pix-gdp2",
- "clk-pix-gdp3",
- "clk-pix-gdp4",
- "clk-pix-aux-disp",
- "clk-denc",
- "clk-pix-hddac",
- "clk-hddac",
- "clk-sddac",
- "clk-pix-dvo",
- "clk-dvo",
- "clk-pix-hdmi",
- "clk-tmds-hdmi",
- "clk-ref-hdmiphy";
- };
+ };
};
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
@@ -301,22 +237,13 @@
clk_s_d3_flexgen: clk-s-d3-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih407-d3";
clocks = <&clk_s_d3_quadfs 0>,
<&clk_s_d3_quadfs 1>,
<&clk_s_d3_quadfs 2>,
<&clk_s_d3_quadfs 3>,
<&clk_sysin>;
-
- clock-output-names = "clk-stfe-frc1",
- "clk-tsout-0",
- "clk-tsout-1",
- "clk-mchi",
- "clk-vsens-compo",
- "clk-frc1-remote",
- "clk-lpc-0",
- "clk-lpc-1";
};
};
};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 03/13] ARM: dts: sti: update flexgen compatible within stih410-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
2021-03-31 20:42 ` [PATCH v3 01/13] ARM: dts: sti: update flexgen compatible within stih418-clock Alain Volmat
2021-03-31 20:42 ` [PATCH v3 02/13] ARM: dts: sti: update flexgen compatible within stih407-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:04 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 04/13] ARM: dts: sti: update clkgen-pll entries in stih407-clock Alain Volmat
` (9 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
With the introduction of new flexgen compatible within the clk-flexgen
driver, remove the clock-output-names entry from the flexgen nodes
and set the new proper compatible corresponding.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih410-clock.dtsi | 95 ++--------------------------
1 file changed, 6 insertions(+), 89 deletions(-)
diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
index 81a8c25d7ba5..04b0d7080353 100644
--- a/arch/arm/boot/dts/stih410-clock.dtsi
+++ b/arch/arm/boot/dts/stih410-clock.dtsi
@@ -83,16 +83,12 @@
};
clk_s_a0_flexgen: clk-s-a0-flexgen {
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih410-a0";
#clock-cells = <1>;
clocks = <&clk_s_a0_pll 0>,
<&clk_sysin>;
-
- clock-output-names = "clk-ic-lmi0",
- "clk-ic-lmi1";
- clock-critical = <CLK_IC_LMI0>;
};
};
@@ -135,7 +131,7 @@
clk_s_c0_flexgen: clk-s-c0-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih410-c0";
clocks = <&clk_s_c0_pll0 0>,
<&clk_s_c0_pll1 0>,
@@ -145,52 +141,6 @@
<&clk_s_c0_quadfs 3>,
<&clk_sysin>;
- clock-output-names = "clk-icn-gpu",
- "clk-fdma",
- "clk-nand",
- "clk-hva",
- "clk-proc-stfe",
- "clk-proc-tp",
- "clk-rx-icn-dmu",
- "clk-rx-icn-hva",
- "clk-icn-cpu",
- "clk-tx-icn-dmu",
- "clk-mmc-0",
- "clk-mmc-1",
- "clk-jpegdec",
- "clk-ext2fa9",
- "clk-ic-bdisp-0",
- "clk-ic-bdisp-1",
- "clk-pp-dmu",
- "clk-vid-dmu",
- "clk-dss-lpc",
- "clk-st231-aud-0",
- "clk-st231-gp-1",
- "clk-st231-dmu",
- "clk-icn-lmi",
- "clk-tx-icn-disp-1",
- "clk-icn-sbc",
- "clk-stfe-frc2",
- "clk-eth-phy",
- "clk-eth-ref-phyclk",
- "clk-flash-promip",
- "clk-main-disp",
- "clk-aux-disp",
- "clk-compo-dvp",
- "clk-tx-icn-hades",
- "clk-rx-icn-hades",
- "clk-icn-reg-16",
- "clk-pp-hades",
- "clk-clust-hades",
- "clk-hwpe-hades",
- "clk-fc-hades";
- clock-critical = <CLK_PROC_STFE>,
- <CLK_ICN_CPU>,
- <CLK_TX_ICN_DMU>,
- <CLK_EXT2F_A9>,
- <CLK_ICN_LMI>,
- <CLK_ICN_SBC>;
-
/*
* ARM Peripheral clock for timers
*/
@@ -227,20 +177,13 @@
clk_s_d0_flexgen: clk-s-d0-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen-audio", "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih410-d0";
clocks = <&clk_s_d0_quadfs 0>,
<&clk_s_d0_quadfs 1>,
<&clk_s_d0_quadfs 2>,
<&clk_s_d0_quadfs 3>,
<&clk_sysin>;
-
- clock-output-names = "clk-pcm-0",
- "clk-pcm-1",
- "clk-pcm-2",
- "clk-spdiff",
- "clk-pcmr10-master",
- "clk-usb2-phy";
};
};
@@ -263,7 +206,7 @@
clk_s_d2_flexgen: clk-s-d2-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen-video", "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih407-d2";
clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
@@ -272,24 +215,7 @@
<&clk_sysin>,
<&clk_sysin>,
<&clk_tmdsout_hdmi>;
-
- clock-output-names = "clk-pix-main-disp",
- "clk-pix-pip",
- "clk-pix-gdp1",
- "clk-pix-gdp2",
- "clk-pix-gdp3",
- "clk-pix-gdp4",
- "clk-pix-aux-disp",
- "clk-denc",
- "clk-pix-hddac",
- "clk-hddac",
- "clk-sddac",
- "clk-pix-dvo",
- "clk-dvo",
- "clk-pix-hdmi",
- "clk-tmds-hdmi",
- "clk-ref-hdmiphy";
- };
+ };
};
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
@@ -311,22 +237,13 @@
clk_s_d3_flexgen: clk-s-d3-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen";
+ compatible = "st,flexgen", "st,flexgen-stih407-d3";
clocks = <&clk_s_d3_quadfs 0>,
<&clk_s_d3_quadfs 1>,
<&clk_s_d3_quadfs 2>,
<&clk_s_d3_quadfs 3>,
<&clk_sysin>;
-
- clock-output-names = "clk-stfe-frc1",
- "clk-tsout-0",
- "clk-tsout-1",
- "clk-mchi",
- "clk-vsens-compo",
- "clk-frc1-remote",
- "clk-lpc-0",
- "clk-lpc-1";
};
};
};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 04/13] ARM: dts: sti: update clkgen-pll entries in stih407-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (2 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 03/13] ARM: dts: sti: update flexgen compatible within stih410-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:04 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 05/13] ARM: dts: sti: update clkgen-pll entries in stih410-clock Alain Volmat
` (8 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 16 +++-------------
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index ecd568777e5f..2603226a6ca8 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -36,8 +36,6 @@
compatible = "st,stih407-clkgen-plla9";
clocks = <&clk_sysin>;
-
- clock-output-names = "clockgen-a9-pll-odf";
};
};
@@ -74,12 +72,9 @@
clk_s_a0_pll: clk-s-a0-pll {
#clock-cells = <1>;
- compatible = "st,clkgen-pll0";
+ compatible = "st,clkgen-pll0-a0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-a0-pll-ofd-0";
- clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */
};
clk_s_a0_flexgen: clk-s-a0-flexgen {
@@ -112,21 +107,16 @@
clk_s_c0_pll0: clk-s-c0-pll0 {
#clock-cells = <1>;
- compatible = "st,clkgen-pll0";
+ compatible = "st,clkgen-pll0-c0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-pll0-odf-0";
- clock-critical = <0>; /* clk-s-c0-pll0-odf-0 */
};
clk_s_c0_pll1: clk-s-c0-pll1 {
#clock-cells = <1>;
- compatible = "st,clkgen-pll1";
+ compatible = "st,clkgen-pll1-c0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-pll1-odf-0";
};
clk_s_c0_flexgen: clk-s-c0-flexgen {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 05/13] ARM: dts: sti: update clkgen-pll entries in stih410-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (3 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 04/13] ARM: dts: sti: update clkgen-pll entries in stih407-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:05 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 06/13] ARM: dts: sti: update clkgen-pll entries in stih418-clock Alain Volmat
` (7 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih410-clock.dtsi | 16 +++-------------
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
index 04b0d7080353..3aeabdd6e305 100644
--- a/arch/arm/boot/dts/stih410-clock.dtsi
+++ b/arch/arm/boot/dts/stih410-clock.dtsi
@@ -39,8 +39,6 @@
compatible = "st,stih407-clkgen-plla9";
clocks = <&clk_sysin>;
-
- clock-output-names = "clockgen-a9-pll-odf";
};
};
@@ -74,12 +72,9 @@
clk_s_a0_pll: clk-s-a0-pll {
#clock-cells = <1>;
- compatible = "st,clkgen-pll0";
+ compatible = "st,clkgen-pll0-a0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-a0-pll-ofd-0";
- clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */
};
clk_s_a0_flexgen: clk-s-a0-flexgen {
@@ -112,21 +107,16 @@
clk_s_c0_pll0: clk-s-c0-pll0 {
#clock-cells = <1>;
- compatible = "st,clkgen-pll0";
+ compatible = "st,clkgen-pll0-c0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-pll0-odf-0";
- clock-critical = <0>; /* clk-s-c0-pll0-odf-0 */
};
clk_s_c0_pll1: clk-s-c0-pll1 {
#clock-cells = <1>;
- compatible = "st,clkgen-pll1";
+ compatible = "st,clkgen-pll1-c0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-pll1-odf-0";
};
clk_s_c0_flexgen: clk-s-c0-flexgen {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 06/13] ARM: dts: sti: update clkgen-pll entries in stih418-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (4 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 05/13] ARM: dts: sti: update clkgen-pll entries in stih410-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:05 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 07/13] ARM: dts: sti: update clkgen-fsyn entries in stih407-clock Alain Volmat
` (6 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The clkgen-pll driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih418-clock.dtsi | 14 +++-----------
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index 35d12979cdf4..d628e656458d 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -39,8 +39,6 @@
compatible = "st,stih418-clkgen-plla9";
clocks = <&clk_sysin>;
-
- clock-output-names = "clockgen-a9-pll-odf";
};
};
@@ -75,11 +73,9 @@
clk_s_a0_pll: clk-s-a0-pll {
#clock-cells = <1>;
- compatible = "st,clkgen-pll0";
+ compatible = "st,clkgen-pll0-a0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-a0-pll-ofd-0";
};
clk_s_a0_flexgen: clk-s-a0-flexgen {
@@ -111,20 +107,16 @@
clk_s_c0_pll0: clk-s-c0-pll0 {
#clock-cells = <1>;
- compatible = "st,clkgen-pll0";
+ compatible = "st,clkgen-pll0-c0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-pll0-odf-0";
};
clk_s_c0_pll1: clk-s-c0-pll1 {
#clock-cells = <1>;
- compatible = "st,clkgen-pll1";
+ compatible = "st,clkgen-pll1-c0";
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-pll1-odf-0";
};
clk_s_c0_flexgen: clk-s-c0-flexgen {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 07/13] ARM: dts: sti: update clkgen-fsyn entries in stih407-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (5 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 06/13] ARM: dts: sti: update clkgen-pll entries in stih418-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:06 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 08/13] ARM: dts: sti: update clkgen-fsyn entries in stih410-clock Alain Volmat
` (5 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih407-clock.dtsi | 27 +++------------------------
1 file changed, 3 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 2603226a6ca8..9cce9541e26b 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -93,12 +93,6 @@
reg = <0x9103000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-fs0-ch0",
- "clk-s-c0-fs0-ch1",
- "clk-s-c0-fs0-ch2",
- "clk-s-c0-fs0-ch3";
- clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
};
clk_s_c0: clockgen-c@9103000 {
@@ -150,15 +144,10 @@
clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d0";
reg = <0x9104000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d0-fs0-ch0",
- "clk-s-d0-fs0-ch1",
- "clk-s-d0-fs0-ch2",
- "clk-s-d0-fs0-ch3";
};
clockgen-d0@9104000 {
@@ -179,15 +168,10 @@
clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d2";
reg = <0x9106000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d2-fs0-ch0",
- "clk-s-d2-fs0-ch1",
- "clk-s-d2-fs0-ch2",
- "clk-s-d2-fs0-ch3";
};
clockgen-d2@9106000 {
@@ -210,15 +194,10 @@
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d3";
reg = <0x9107000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d3-fs0-ch0",
- "clk-s-d3-fs0-ch1",
- "clk-s-d3-fs0-ch2",
- "clk-s-d3-fs0-ch3";
};
clockgen-d3@9107000 {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 08/13] ARM: dts: sti: update clkgen-fsyn entries in stih410-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (6 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 07/13] ARM: dts: sti: update clkgen-fsyn entries in stih407-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:07 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 09/13] ARM: dts: sti: update clkgen-fsyn entries in stih418-clock Alain Volmat
` (4 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih410-clock.dtsi | 27 +++------------------------
1 file changed, 3 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
index 3aeabdd6e305..6b0e6d4477a3 100644
--- a/arch/arm/boot/dts/stih410-clock.dtsi
+++ b/arch/arm/boot/dts/stih410-clock.dtsi
@@ -93,12 +93,6 @@
reg = <0x9103000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-fs0-ch0",
- "clk-s-c0-fs0-ch1",
- "clk-s-c0-fs0-ch2",
- "clk-s-c0-fs0-ch3";
- clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
};
clk_s_c0: clockgen-c@9103000 {
@@ -150,15 +144,10 @@
clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d0";
reg = <0x9104000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d0-fs0-ch0",
- "clk-s-d0-fs0-ch1",
- "clk-s-d0-fs0-ch2",
- "clk-s-d0-fs0-ch3";
};
clockgen-d0@9104000 {
@@ -179,15 +168,10 @@
clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d2";
reg = <0x9106000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d2-fs0-ch0",
- "clk-s-d2-fs0-ch1",
- "clk-s-d2-fs0-ch2",
- "clk-s-d2-fs0-ch3";
};
clockgen-d2@9106000 {
@@ -210,15 +194,10 @@
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d3";
reg = <0x9107000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d3-fs0-ch0",
- "clk-s-d3-fs0-ch1",
- "clk-s-d3-fs0-ch2",
- "clk-s-d3-fs0-ch3";
};
clockgen-d3@9107000 {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 09/13] ARM: dts: sti: update clkgen-fsyn entries in stih418-clock
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (7 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 08/13] ARM: dts: sti: update clkgen-fsyn entries in stih410-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:07 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 10/13] ARM: dts: sti: add the spinor controller node within stih407-family Alain Volmat
` (3 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih418-clock.dtsi | 26 +++-----------------------
1 file changed, 3 insertions(+), 23 deletions(-)
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index d628e656458d..e84c476b83ed 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -94,11 +94,6 @@
reg = <0x9103000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-c0-fs0-ch0",
- "clk-s-c0-fs0-ch1",
- "clk-s-c0-fs0-ch2",
- "clk-s-c0-fs0-ch3";
};
clk_s_c0: clockgen-c@9103000 {
@@ -150,15 +145,10 @@
clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d0";
reg = <0x9104000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d0-fs0-ch0",
- "clk-s-d0-fs0-ch1",
- "clk-s-d0-fs0-ch2",
- "clk-s-d0-fs0-ch3";
};
clockgen-d0@9104000 {
@@ -179,15 +169,10 @@
clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d2";
reg = <0x9106000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d2-fs0-ch0",
- "clk-s-d2-fs0-ch1",
- "clk-s-d2-fs0-ch2",
- "clk-s-d2-fs0-ch3";
};
clockgen-d2@9106000 {
@@ -210,15 +195,10 @@
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
#clock-cells = <1>;
- compatible = "st,quadfs";
+ compatible = "st,quadfs-d3";
reg = <0x9107000 0x1000>;
clocks = <&clk_sysin>;
-
- clock-output-names = "clk-s-d3-fs0-ch0",
- "clk-s-d3-fs0-ch1",
- "clk-s-d3-fs0-ch2",
- "clk-s-d3-fs0-ch3";
};
clockgen-d3@9107000 {
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 10/13] ARM: dts: sti: add the spinor controller node within stih407-family
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (8 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 09/13] ARM: dts: sti: update clkgen-fsyn entries in stih418-clock Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:08 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 11/13] ARM: dts: sti: disable rng11 on the stih418 platform Alain Volmat
` (2 subsequent siblings)
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The STiH407 family (and further versions STiH410/STiH418) embedded
a serial flash controller allowing fast access to SPI-NOR.
This commit adds the corresponding node, relying on the st-spi-fsm
drivers.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
v2: commit log improvement
arch/arm/boot/dts/stih407-family.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 23a1746f3baa..21f3347a91d6 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -616,6 +616,21 @@
st,lpc-mode = <ST_LPC_MODE_CLKSRC>;
};
+ spifsm: spifsm@9022000{
+ compatible = "st,spi-fsm";
+ reg = <0x9022000 0x1000>;
+ reg-names = "spi-fsm";
+ clocks = <&clk_s_c0_flexgen CLK_FLASH_PROMIP>;
+ clock-names = "emi_clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fsm>;
+ st,syscfg = <&syscfg_core>;
+ st,boot-device-reg = <0x8c4>;
+ st,boot-device-spi = <0x68>;
+
+ status = "disabled";
+ };
+
sata0: sata@9b20000 {
compatible = "st,ahci";
reg = <0x9b20000 0x1000>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 11/13] ARM: dts: sti: disable rng11 on the stih418 platform
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (9 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 10/13] ARM: dts: sti: add the spinor controller node within stih407-family Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:08 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 12/13] ARM: dts: sti: add the thermal sensor node within stih418 Alain Volmat
2021-03-31 20:42 ` [PATCH v3 13/13] ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board Alain Volmat
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The rng11 is not available on the STiH418 hence is disabled in the
stih418.dtsi
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih418.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi
index a05e2278b448..39a249983496 100644
--- a/arch/arm/boot/dts/stih418.dtsi
+++ b/arch/arm/boot/dts/stih418.dtsi
@@ -27,6 +27,10 @@
};
soc {
+ rng11: rng@8a8a000 {
+ status = "disabled";
+ };
+
usb2_picophy1: phy2@0 {
compatible = "st,stih407-usb2-phy";
reg = <0 0>;
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 12/13] ARM: dts: sti: add the thermal sensor node within stih418
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (10 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 11/13] ARM: dts: sti: disable rng11 on the stih418 platform Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:08 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 13/13] ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board Alain Volmat
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
The STiH418 embedded the same sensor as the STiH410.
This commit adds the corresponding node, relying on the st_thermal
driver.
Signed-off-by: Alain Volmat <avolmat@me.com>
---
arch/arm/boot/dts/stih418.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi
index 39a249983496..97eda4392fbe 100644
--- a/arch/arm/boot/dts/stih418.dtsi
+++ b/arch/arm/boot/dts/stih418.dtsi
@@ -108,5 +108,13 @@
assigned-clock-parents = <&clk_s_c0_pll1 0>;
assigned-clock-rates = <200000000>;
};
+
+ thermal@91a0000 {
+ compatible = "st,stih407-thermal";
+ reg = <0x91a0000 0x28>;
+ clock-names = "thermal";
+ clocks = <&clk_sysin>;
+ interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
+ };
};
};
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH v3 13/13] ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
` (11 preceding siblings ...)
2021-03-31 20:42 ` [PATCH v3 12/13] ARM: dts: sti: add the thermal sensor node within stih418 Alain Volmat
@ 2021-03-31 20:42 ` Alain Volmat
2021-08-03 12:09 ` Patrice CHOTARD
12 siblings, 1 reply; 27+ messages in thread
From: Alain Volmat @ 2021-03-31 20:42 UTC (permalink / raw)
To: Patrice Chotard, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel, avolmat
4KOpen (B2264) is a board based on the STMicroelectronics STiH418 soc:
- 2GB DDR
- HDMI
- Ethernet 1000-BaseT
- PCIe (mini PCIe connector)
- MicroSD slot
- USB2 and USB3 connectors
- Sata
- 40 pins GPIO header
Signed-off-by: Alain Volmat <avolmat@me.com>
---
v3: add 300MHz opp, add led, add ethernet pinctrl
v2: fix bootargs (removal of console=)
removal of rng11 node, moved into stih418.dtsi
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/stih418-b2264.dts | 151 ++++++++++++++++++++++++++++
2 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/stih418-b2264.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 8e5d4ab4e75e..3c1877627e91 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1061,7 +1061,8 @@ dtb-$(CONFIG_ARCH_STI) += \
stih407-b2120.dtb \
stih410-b2120.dtb \
stih410-b2260.dtb \
- stih418-b2199.dtb
+ stih418-b2199.dtb \
+ stih418-b2264.dtb
dtb-$(CONFIG_ARCH_STM32) += \
stm32f429-disco.dtb \
stm32f469-disco.dtb \
diff --git a/arch/arm/boot/dts/stih418-b2264.dts b/arch/arm/boot/dts/stih418-b2264.dts
new file mode 100644
index 000000000000..a99604bebf8c
--- /dev/null
+++ b/arch/arm/boot/dts/stih418-b2264.dts
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2021 STMicroelectronics
+ * Author: Alain Volmat <avolmat@me.com>
+ */
+/dts-v1/;
+#include "stih418.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+/ {
+ model = "STiH418 B2264";
+ compatible = "st,stih418-b2264", "st,stih418";
+
+ chosen {
+ stdout-path = &sbc_serial0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0xc0000000>;
+ };
+
+ cpus {
+ cpu@0 {
+ operating-points-v2 = <&cpu_opp_table>;
+ /* u-boot puts hpen in SBC dmem at 0xb8 offset */
+ cpu-release-addr = <0x94100b8>;
+ };
+ cpu@1 {
+ operating-points-v2 = <&cpu_opp_table>;
+ /* u-boot puts hpen in SBC dmem at 0xb8 offset */
+ cpu-release-addr = <0x94100b8>;
+ };
+ cpu@2 {
+ operating-points-v2 = <&cpu_opp_table>;
+ /* u-boot puts hpen in SBC dmem at 0xb8 offset */
+ cpu-release-addr = <0x94100b8>;
+ };
+ cpu@3 {
+ operating-points-v2 = <&cpu_opp_table>;
+ /* u-boot puts hpen in SBC dmem at 0xb8 offset */
+ cpu-release-addr = <0x94100b8>;
+ };
+ };
+
+ cpu_opp_table: opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <784000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <784000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <784000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <784000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <784000>;
+ };
+ };
+
+ aliases {
+ ttyAS0 = &sbc_serial0;
+ ethernet0 = ðernet0;
+ };
+
+ soc {
+ leds {
+ compatible = "gpio-leds";
+ green {
+ gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ pin-controller-sbc@961f080 {
+ gmac1 {
+ rgmii1-0 {
+ st,pins {
+ rxd0 = <&pio1 4 ALT1 IN DE_IO 300 CLK_A>;
+ rxd1 = <&pio1 5 ALT1 IN DE_IO 300 CLK_A>;
+ rxd2 = <&pio1 6 ALT1 IN DE_IO 300 CLK_A>;
+ rxd3 = <&pio1 7 ALT1 IN DE_IO 300 CLK_A>;
+ rxdv = <&pio2 0 ALT1 IN DE_IO 300 CLK_A>;
+ };
+ };
+ };
+ };
+
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+ðernet0 {
+ phy-mode = "rgmii";
+ pinctrl-0 = <&pinctrl_rgmii1 &pinctrl_rgmii1_mdio_1>;
+ st,tx-retime-src = "clkgen";
+
+ snps,reset-gpio = <&pio0 7 0>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 1000000>;
+
+ status = "okay";
+};
+
+&miphy28lp_phy {
+ phy_port0: port@9b22000 {
+ st,sata-gen = <2>; /* SATA GEN3 */
+ st,osc-rdy;
+ };
+};
+
+&mmc0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sbc_serial0 {
+ status = "okay";
+};
+
+&spifsm {
+ status = "okay";
+};
+
+&st_dwc3 {
+ status = "okay";
+};
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH v3 01/13] ARM: dts: sti: update flexgen compatible within stih418-clock
2021-03-31 20:42 ` [PATCH v3 01/13] ARM: dts: sti: update flexgen compatible within stih418-clock Alain Volmat
@ 2021-08-03 12:03 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:03 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> With the introduction of new flexgen compatible within the clk-flexgen
> driver, remove the clock-output-names entry from the flexgen nodes
> and set the new proper compatible corresponding.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih418-clock.dtsi | 96 ++--------------------------
> 1 file changed, 5 insertions(+), 91 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
> index 8fa092462102..35d12979cdf4 100644
> --- a/arch/arm/boot/dts/stih418-clock.dtsi
> +++ b/arch/arm/boot/dts/stih418-clock.dtsi
> @@ -83,15 +83,12 @@
> };
>
> clk_s_a0_flexgen: clk-s-a0-flexgen {
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih410-a0";
>
> #clock-cells = <1>;
>
> clocks = <&clk_s_a0_pll 0>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-ic-lmi0",
> - "clk-ic-lmi1";
> };
> };
>
> @@ -132,7 +129,7 @@
>
> clk_s_c0_flexgen: clk-s-c0-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih418-c0";
>
> clocks = <&clk_s_c0_pll0 0>,
> <&clk_s_c0_pll1 0>,
> @@ -142,49 +139,6 @@
> <&clk_s_c0_quadfs 3>,
> <&clk_sysin>;
>
> - clock-output-names = "clk-icn-gpu",
> - "clk-fdma",
> - "clk-nand",
> - "clk-hva",
> - "clk-proc-stfe",
> - "clk-tp",
> - "clk-rx-icn-dmu",
> - "clk-rx-icn-hva",
> - "clk-icn-cpu",
> - "clk-tx-icn-dmu",
> - "clk-mmc-0",
> - "clk-mmc-1",
> - "clk-jpegdec",
> - "clk-icn-reg",
> - "clk-proc-bdisp-0",
> - "clk-proc-bdisp-1",
> - "clk-pp-dmu",
> - "clk-vid-dmu",
> - "clk-dss-lpc",
> - "clk-st231-aud-0",
> - "clk-st231-gp-1",
> - "clk-st231-dmu",
> - "clk-icn-lmi",
> - "clk-tx-icn-1",
> - "clk-icn-sbc",
> - "clk-stfe-frc2",
> - "clk-eth-phyref",
> - "clk-eth-ref-phyclk",
> - "clk-flash-promip",
> - "clk-main-disp",
> - "clk-aux-disp",
> - "clk-compo-dvp",
> - "clk-tx-icn-hades",
> - "clk-rx-icn-hades",
> - "clk-icn-reg-16",
> - "clk-pp-hevc",
> - "clk-clust-hevc",
> - "clk-hwpe-hevc",
> - "clk-fc-hevc",
> - "clk-proc-mixer",
> - "clk-proc-sc",
> - "clk-avsp-hevc";
> -
> /*
> * ARM Peripheral clock for timers
> */
> @@ -221,20 +175,13 @@
>
> clk_s_d0_flexgen: clk-s-d0-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen-audio", "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih410-d0";
>
> clocks = <&clk_s_d0_quadfs 0>,
> <&clk_s_d0_quadfs 1>,
> <&clk_s_d0_quadfs 2>,
> <&clk_s_d0_quadfs 3>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-pcm-0",
> - "clk-pcm-1",
> - "clk-pcm-2",
> - "clk-spdiff",
> - "clk-pcmr10-master",
> - "clk-usb2-phy";
> };
> };
>
> @@ -257,7 +204,7 @@
>
> clk_s_d2_flexgen: clk-s-d2-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen-video", "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih418-d2";
>
> clocks = <&clk_s_d2_quadfs 0>,
> <&clk_s_d2_quadfs 1>,
> @@ -266,30 +213,6 @@
> <&clk_sysin>,
> <&clk_sysin>,
> <&clk_tmdsout_hdmi>;
> -
> - clock-output-names = "clk-pix-main-disp",
> - "",
> - "",
> - "",
> - "",
> - "clk-tmds-hdmi-div2",
> - "clk-pix-aux-disp",
> - "clk-denc",
> - "clk-pix-hddac",
> - "clk-hddac",
> - "clk-sddac",
> - "clk-pix-dvo",
> - "clk-dvo",
> - "clk-pix-hdmi",
> - "clk-tmds-hdmi",
> - "clk-ref-hdmiphy",
> - "", "", "", "", "",
> - "", "", "", "", "",
> - "", "", "", "", "",
> - "", "", "", "", "",
> - "", "", "", "", "",
> - "", "", "", "", "",
> - "", "clk-vp9";
> };
> };
>
> @@ -312,22 +235,13 @@
>
> clk_s_d3_flexgen: clk-s-d3-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih407-d3";
>
> clocks = <&clk_s_d3_quadfs 0>,
> <&clk_s_d3_quadfs 1>,
> <&clk_s_d3_quadfs 2>,
> <&clk_s_d3_quadfs 3>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-stfe-frc1",
> - "clk-tsout-0",
> - "clk-tsout-1",
> - "clk-mchi",
> - "clk-vsens-compo",
> - "clk-frc1-remote",
> - "clk-lpc-0",
> - "clk-lpc-1";
> };
> };
> };
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 02/13] ARM: dts: sti: update flexgen compatible within stih407-clock
2021-03-31 20:42 ` [PATCH v3 02/13] ARM: dts: sti: update flexgen compatible within stih407-clock Alain Volmat
@ 2021-08-03 12:03 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:03 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> With the introduction of new flexgen compatible within the clk-flexgen
> driver, remove the clock-output-names entry from the flexgen nodes
> and set the new proper compatible corresponding.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih407-clock.dtsi | 85 ++--------------------------
> 1 file changed, 6 insertions(+), 79 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
> index 1ab40db7c91a..ecd568777e5f 100644
> --- a/arch/arm/boot/dts/stih407-clock.dtsi
> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
> @@ -83,15 +83,12 @@
> };
>
> clk_s_a0_flexgen: clk-s-a0-flexgen {
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih407-a0";
>
> #clock-cells = <1>;
>
> clocks = <&clk_s_a0_pll 0>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-ic-lmi0";
> - clock-critical = <CLK_IC_LMI0>;
> };
> };
>
> @@ -134,7 +131,7 @@
>
> clk_s_c0_flexgen: clk-s-c0-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih407-c0";
>
> clocks = <&clk_s_c0_pll0 0>,
> <&clk_s_c0_pll1 0>,
> @@ -144,45 +141,6 @@
> <&clk_s_c0_quadfs 3>,
> <&clk_sysin>;
>
> - clock-output-names = "clk-icn-gpu",
> - "clk-fdma",
> - "clk-nand",
> - "clk-hva",
> - "clk-proc-stfe",
> - "clk-proc-tp",
> - "clk-rx-icn-dmu",
> - "clk-rx-icn-hva",
> - "clk-icn-cpu",
> - "clk-tx-icn-dmu",
> - "clk-mmc-0",
> - "clk-mmc-1",
> - "clk-jpegdec",
> - "clk-ext2fa9",
> - "clk-ic-bdisp-0",
> - "clk-ic-bdisp-1",
> - "clk-pp-dmu",
> - "clk-vid-dmu",
> - "clk-dss-lpc",
> - "clk-st231-aud-0",
> - "clk-st231-gp-1",
> - "clk-st231-dmu",
> - "clk-icn-lmi",
> - "clk-tx-icn-disp-1",
> - "clk-icn-sbc",
> - "clk-stfe-frc2",
> - "clk-eth-phy",
> - "clk-eth-ref-phyclk",
> - "clk-flash-promip",
> - "clk-main-disp",
> - "clk-aux-disp",
> - "clk-compo-dvp";
> - clock-critical = <CLK_PROC_STFE>,
> - <CLK_ICN_CPU>,
> - <CLK_TX_ICN_DMU>,
> - <CLK_EXT2F_A9>,
> - <CLK_ICN_LMI>,
> - <CLK_ICN_SBC>;
> -
> /*
> * ARM Peripheral clock for timers
> */
> @@ -219,18 +177,13 @@
>
> clk_s_d0_flexgen: clk-s-d0-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen-audio", "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih407-d0";
>
> clocks = <&clk_s_d0_quadfs 0>,
> <&clk_s_d0_quadfs 1>,
> <&clk_s_d0_quadfs 2>,
> <&clk_s_d0_quadfs 3>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-pcm-0",
> - "clk-pcm-1",
> - "clk-pcm-2",
> - "clk-spdiff";
> };
> };
>
> @@ -253,7 +206,7 @@
>
> clk_s_d2_flexgen: clk-s-d2-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen-video", "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih407-d2";
>
> clocks = <&clk_s_d2_quadfs 0>,
> <&clk_s_d2_quadfs 1>,
> @@ -262,24 +215,7 @@
> <&clk_sysin>,
> <&clk_sysin>,
> <&clk_tmdsout_hdmi>;
> -
> - clock-output-names = "clk-pix-main-disp",
> - "clk-pix-pip",
> - "clk-pix-gdp1",
> - "clk-pix-gdp2",
> - "clk-pix-gdp3",
> - "clk-pix-gdp4",
> - "clk-pix-aux-disp",
> - "clk-denc",
> - "clk-pix-hddac",
> - "clk-hddac",
> - "clk-sddac",
> - "clk-pix-dvo",
> - "clk-dvo",
> - "clk-pix-hdmi",
> - "clk-tmds-hdmi",
> - "clk-ref-hdmiphy";
> - };
> + };
> };
>
> clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
> @@ -301,22 +237,13 @@
>
> clk_s_d3_flexgen: clk-s-d3-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih407-d3";
>
> clocks = <&clk_s_d3_quadfs 0>,
> <&clk_s_d3_quadfs 1>,
> <&clk_s_d3_quadfs 2>,
> <&clk_s_d3_quadfs 3>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-stfe-frc1",
> - "clk-tsout-0",
> - "clk-tsout-1",
> - "clk-mchi",
> - "clk-vsens-compo",
> - "clk-frc1-remote",
> - "clk-lpc-0",
> - "clk-lpc-1";
> };
> };
> };
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 03/13] ARM: dts: sti: update flexgen compatible within stih410-clock
2021-03-31 20:42 ` [PATCH v3 03/13] ARM: dts: sti: update flexgen compatible within stih410-clock Alain Volmat
@ 2021-08-03 12:04 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:04 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> With the introduction of new flexgen compatible within the clk-flexgen
> driver, remove the clock-output-names entry from the flexgen nodes
> and set the new proper compatible corresponding.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih410-clock.dtsi | 95 ++--------------------------
> 1 file changed, 6 insertions(+), 89 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
> index 81a8c25d7ba5..04b0d7080353 100644
> --- a/arch/arm/boot/dts/stih410-clock.dtsi
> +++ b/arch/arm/boot/dts/stih410-clock.dtsi
> @@ -83,16 +83,12 @@
> };
>
> clk_s_a0_flexgen: clk-s-a0-flexgen {
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih410-a0";
>
> #clock-cells = <1>;
>
> clocks = <&clk_s_a0_pll 0>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-ic-lmi0",
> - "clk-ic-lmi1";
> - clock-critical = <CLK_IC_LMI0>;
> };
> };
>
> @@ -135,7 +131,7 @@
>
> clk_s_c0_flexgen: clk-s-c0-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih410-c0";
>
> clocks = <&clk_s_c0_pll0 0>,
> <&clk_s_c0_pll1 0>,
> @@ -145,52 +141,6 @@
> <&clk_s_c0_quadfs 3>,
> <&clk_sysin>;
>
> - clock-output-names = "clk-icn-gpu",
> - "clk-fdma",
> - "clk-nand",
> - "clk-hva",
> - "clk-proc-stfe",
> - "clk-proc-tp",
> - "clk-rx-icn-dmu",
> - "clk-rx-icn-hva",
> - "clk-icn-cpu",
> - "clk-tx-icn-dmu",
> - "clk-mmc-0",
> - "clk-mmc-1",
> - "clk-jpegdec",
> - "clk-ext2fa9",
> - "clk-ic-bdisp-0",
> - "clk-ic-bdisp-1",
> - "clk-pp-dmu",
> - "clk-vid-dmu",
> - "clk-dss-lpc",
> - "clk-st231-aud-0",
> - "clk-st231-gp-1",
> - "clk-st231-dmu",
> - "clk-icn-lmi",
> - "clk-tx-icn-disp-1",
> - "clk-icn-sbc",
> - "clk-stfe-frc2",
> - "clk-eth-phy",
> - "clk-eth-ref-phyclk",
> - "clk-flash-promip",
> - "clk-main-disp",
> - "clk-aux-disp",
> - "clk-compo-dvp",
> - "clk-tx-icn-hades",
> - "clk-rx-icn-hades",
> - "clk-icn-reg-16",
> - "clk-pp-hades",
> - "clk-clust-hades",
> - "clk-hwpe-hades",
> - "clk-fc-hades";
> - clock-critical = <CLK_PROC_STFE>,
> - <CLK_ICN_CPU>,
> - <CLK_TX_ICN_DMU>,
> - <CLK_EXT2F_A9>,
> - <CLK_ICN_LMI>,
> - <CLK_ICN_SBC>;
> -
> /*
> * ARM Peripheral clock for timers
> */
> @@ -227,20 +177,13 @@
>
> clk_s_d0_flexgen: clk-s-d0-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen-audio", "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih410-d0";
>
> clocks = <&clk_s_d0_quadfs 0>,
> <&clk_s_d0_quadfs 1>,
> <&clk_s_d0_quadfs 2>,
> <&clk_s_d0_quadfs 3>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-pcm-0",
> - "clk-pcm-1",
> - "clk-pcm-2",
> - "clk-spdiff",
> - "clk-pcmr10-master",
> - "clk-usb2-phy";
> };
> };
>
> @@ -263,7 +206,7 @@
>
> clk_s_d2_flexgen: clk-s-d2-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen-video", "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih407-d2";
>
> clocks = <&clk_s_d2_quadfs 0>,
> <&clk_s_d2_quadfs 1>,
> @@ -272,24 +215,7 @@
> <&clk_sysin>,
> <&clk_sysin>,
> <&clk_tmdsout_hdmi>;
> -
> - clock-output-names = "clk-pix-main-disp",
> - "clk-pix-pip",
> - "clk-pix-gdp1",
> - "clk-pix-gdp2",
> - "clk-pix-gdp3",
> - "clk-pix-gdp4",
> - "clk-pix-aux-disp",
> - "clk-denc",
> - "clk-pix-hddac",
> - "clk-hddac",
> - "clk-sddac",
> - "clk-pix-dvo",
> - "clk-dvo",
> - "clk-pix-hdmi",
> - "clk-tmds-hdmi",
> - "clk-ref-hdmiphy";
> - };
> + };
> };
>
> clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
> @@ -311,22 +237,13 @@
>
> clk_s_d3_flexgen: clk-s-d3-flexgen {
> #clock-cells = <1>;
> - compatible = "st,flexgen";
> + compatible = "st,flexgen", "st,flexgen-stih407-d3";
>
> clocks = <&clk_s_d3_quadfs 0>,
> <&clk_s_d3_quadfs 1>,
> <&clk_s_d3_quadfs 2>,
> <&clk_s_d3_quadfs 3>,
> <&clk_sysin>;
> -
> - clock-output-names = "clk-stfe-frc1",
> - "clk-tsout-0",
> - "clk-tsout-1",
> - "clk-mchi",
> - "clk-vsens-compo",
> - "clk-frc1-remote",
> - "clk-lpc-0",
> - "clk-lpc-1";
> };
> };
> };
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 04/13] ARM: dts: sti: update clkgen-pll entries in stih407-clock
2021-03-31 20:42 ` [PATCH v3 04/13] ARM: dts: sti: update clkgen-pll entries in stih407-clock Alain Volmat
@ 2021-08-03 12:04 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:04 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The clkgen-pll driver now embed the clock names (assuming the
> right compatible is used). Remove all clock-output-names property
> and update when necessary the compatible.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih407-clock.dtsi | 16 +++-------------
> 1 file changed, 3 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
> index ecd568777e5f..2603226a6ca8 100644
> --- a/arch/arm/boot/dts/stih407-clock.dtsi
> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
> @@ -36,8 +36,6 @@
> compatible = "st,stih407-clkgen-plla9";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clockgen-a9-pll-odf";
> };
> };
>
> @@ -74,12 +72,9 @@
>
> clk_s_a0_pll: clk-s-a0-pll {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll0";
> + compatible = "st,clkgen-pll0-a0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-a0-pll-ofd-0";
> - clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */
> };
>
> clk_s_a0_flexgen: clk-s-a0-flexgen {
> @@ -112,21 +107,16 @@
>
> clk_s_c0_pll0: clk-s-c0-pll0 {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll0";
> + compatible = "st,clkgen-pll0-c0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-pll0-odf-0";
> - clock-critical = <0>; /* clk-s-c0-pll0-odf-0 */
> };
>
> clk_s_c0_pll1: clk-s-c0-pll1 {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll1";
> + compatible = "st,clkgen-pll1-c0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-pll1-odf-0";
> };
>
> clk_s_c0_flexgen: clk-s-c0-flexgen {
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 05/13] ARM: dts: sti: update clkgen-pll entries in stih410-clock
2021-03-31 20:42 ` [PATCH v3 05/13] ARM: dts: sti: update clkgen-pll entries in stih410-clock Alain Volmat
@ 2021-08-03 12:05 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:05 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The clkgen-pll driver now embed the clock names (assuming the
> right compatible is used). Remove all clock-output-names property
> and update when necessary the compatible.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih410-clock.dtsi | 16 +++-------------
> 1 file changed, 3 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
> index 04b0d7080353..3aeabdd6e305 100644
> --- a/arch/arm/boot/dts/stih410-clock.dtsi
> +++ b/arch/arm/boot/dts/stih410-clock.dtsi
> @@ -39,8 +39,6 @@
> compatible = "st,stih407-clkgen-plla9";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clockgen-a9-pll-odf";
> };
> };
>
> @@ -74,12 +72,9 @@
>
> clk_s_a0_pll: clk-s-a0-pll {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll0";
> + compatible = "st,clkgen-pll0-a0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-a0-pll-ofd-0";
> - clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */
> };
>
> clk_s_a0_flexgen: clk-s-a0-flexgen {
> @@ -112,21 +107,16 @@
>
> clk_s_c0_pll0: clk-s-c0-pll0 {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll0";
> + compatible = "st,clkgen-pll0-c0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-pll0-odf-0";
> - clock-critical = <0>; /* clk-s-c0-pll0-odf-0 */
> };
>
> clk_s_c0_pll1: clk-s-c0-pll1 {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll1";
> + compatible = "st,clkgen-pll1-c0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-pll1-odf-0";
> };
>
> clk_s_c0_flexgen: clk-s-c0-flexgen {
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 06/13] ARM: dts: sti: update clkgen-pll entries in stih418-clock
2021-03-31 20:42 ` [PATCH v3 06/13] ARM: dts: sti: update clkgen-pll entries in stih418-clock Alain Volmat
@ 2021-08-03 12:05 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:05 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The clkgen-pll driver now embed the clock names (assuming the
> right compatible is used). Remove all clock-output-names property
> and update when necessary the compatible.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih418-clock.dtsi | 14 +++-----------
> 1 file changed, 3 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
> index 35d12979cdf4..d628e656458d 100644
> --- a/arch/arm/boot/dts/stih418-clock.dtsi
> +++ b/arch/arm/boot/dts/stih418-clock.dtsi
> @@ -39,8 +39,6 @@
> compatible = "st,stih418-clkgen-plla9";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clockgen-a9-pll-odf";
> };
> };
>
> @@ -75,11 +73,9 @@
>
> clk_s_a0_pll: clk-s-a0-pll {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll0";
> + compatible = "st,clkgen-pll0-a0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-a0-pll-ofd-0";
> };
>
> clk_s_a0_flexgen: clk-s-a0-flexgen {
> @@ -111,20 +107,16 @@
>
> clk_s_c0_pll0: clk-s-c0-pll0 {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll0";
> + compatible = "st,clkgen-pll0-c0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-pll0-odf-0";
> };
>
> clk_s_c0_pll1: clk-s-c0-pll1 {
> #clock-cells = <1>;
> - compatible = "st,clkgen-pll1";
> + compatible = "st,clkgen-pll1-c0";
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-pll1-odf-0";
> };
>
> clk_s_c0_flexgen: clk-s-c0-flexgen {
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 07/13] ARM: dts: sti: update clkgen-fsyn entries in stih407-clock
2021-03-31 20:42 ` [PATCH v3 07/13] ARM: dts: sti: update clkgen-fsyn entries in stih407-clock Alain Volmat
@ 2021-08-03 12:06 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:06 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The clkgen-fsyn driver now embed the clock names (assuming the
> right compatible is used). Remove all clock-output-names property
> and update when necessary the compatible.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih407-clock.dtsi | 27 +++------------------------
> 1 file changed, 3 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
> index 2603226a6ca8..9cce9541e26b 100644
> --- a/arch/arm/boot/dts/stih407-clock.dtsi
> +++ b/arch/arm/boot/dts/stih407-clock.dtsi
> @@ -93,12 +93,6 @@
> reg = <0x9103000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-fs0-ch0",
> - "clk-s-c0-fs0-ch1",
> - "clk-s-c0-fs0-ch2",
> - "clk-s-c0-fs0-ch3";
> - clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
> };
>
> clk_s_c0: clockgen-c@9103000 {
> @@ -150,15 +144,10 @@
>
> clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d0";
> reg = <0x9104000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d0-fs0-ch0",
> - "clk-s-d0-fs0-ch1",
> - "clk-s-d0-fs0-ch2",
> - "clk-s-d0-fs0-ch3";
> };
>
> clockgen-d0@9104000 {
> @@ -179,15 +168,10 @@
>
> clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d2";
> reg = <0x9106000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d2-fs0-ch0",
> - "clk-s-d2-fs0-ch1",
> - "clk-s-d2-fs0-ch2",
> - "clk-s-d2-fs0-ch3";
> };
>
> clockgen-d2@9106000 {
> @@ -210,15 +194,10 @@
>
> clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d3";
> reg = <0x9107000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d3-fs0-ch0",
> - "clk-s-d3-fs0-ch1",
> - "clk-s-d3-fs0-ch2",
> - "clk-s-d3-fs0-ch3";
> };
>
> clockgen-d3@9107000 {
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 08/13] ARM: dts: sti: update clkgen-fsyn entries in stih410-clock
2021-03-31 20:42 ` [PATCH v3 08/13] ARM: dts: sti: update clkgen-fsyn entries in stih410-clock Alain Volmat
@ 2021-08-03 12:07 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:07 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The clkgen-fsyn driver now embed the clock names (assuming the
> right compatible is used). Remove all clock-output-names property
> and update when necessary the compatible.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih410-clock.dtsi | 27 +++------------------------
> 1 file changed, 3 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
> index 3aeabdd6e305..6b0e6d4477a3 100644
> --- a/arch/arm/boot/dts/stih410-clock.dtsi
> +++ b/arch/arm/boot/dts/stih410-clock.dtsi
> @@ -93,12 +93,6 @@
> reg = <0x9103000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-fs0-ch0",
> - "clk-s-c0-fs0-ch1",
> - "clk-s-c0-fs0-ch2",
> - "clk-s-c0-fs0-ch3";
> - clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
> };
>
> clk_s_c0: clockgen-c@9103000 {
> @@ -150,15 +144,10 @@
>
> clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d0";
> reg = <0x9104000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d0-fs0-ch0",
> - "clk-s-d0-fs0-ch1",
> - "clk-s-d0-fs0-ch2",
> - "clk-s-d0-fs0-ch3";
> };
>
> clockgen-d0@9104000 {
> @@ -179,15 +168,10 @@
>
> clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d2";
> reg = <0x9106000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d2-fs0-ch0",
> - "clk-s-d2-fs0-ch1",
> - "clk-s-d2-fs0-ch2",
> - "clk-s-d2-fs0-ch3";
> };
>
> clockgen-d2@9106000 {
> @@ -210,15 +194,10 @@
>
> clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d3";
> reg = <0x9107000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d3-fs0-ch0",
> - "clk-s-d3-fs0-ch1",
> - "clk-s-d3-fs0-ch2",
> - "clk-s-d3-fs0-ch3";
> };
>
> clockgen-d3@9107000 {
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 09/13] ARM: dts: sti: update clkgen-fsyn entries in stih418-clock
2021-03-31 20:42 ` [PATCH v3 09/13] ARM: dts: sti: update clkgen-fsyn entries in stih418-clock Alain Volmat
@ 2021-08-03 12:07 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:07 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The clkgen-fsyn driver now embed the clock names (assuming the
> right compatible is used). Remove all clock-output-names property
> and update when necessary the compatible.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih418-clock.dtsi | 26 +++-----------------------
> 1 file changed, 3 insertions(+), 23 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
> index d628e656458d..e84c476b83ed 100644
> --- a/arch/arm/boot/dts/stih418-clock.dtsi
> +++ b/arch/arm/boot/dts/stih418-clock.dtsi
> @@ -94,11 +94,6 @@
> reg = <0x9103000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-c0-fs0-ch0",
> - "clk-s-c0-fs0-ch1",
> - "clk-s-c0-fs0-ch2",
> - "clk-s-c0-fs0-ch3";
> };
>
> clk_s_c0: clockgen-c@9103000 {
> @@ -150,15 +145,10 @@
>
> clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d0";
> reg = <0x9104000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d0-fs0-ch0",
> - "clk-s-d0-fs0-ch1",
> - "clk-s-d0-fs0-ch2",
> - "clk-s-d0-fs0-ch3";
> };
>
> clockgen-d0@9104000 {
> @@ -179,15 +169,10 @@
>
> clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d2";
> reg = <0x9106000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d2-fs0-ch0",
> - "clk-s-d2-fs0-ch1",
> - "clk-s-d2-fs0-ch2",
> - "clk-s-d2-fs0-ch3";
> };
>
> clockgen-d2@9106000 {
> @@ -210,15 +195,10 @@
>
> clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
> #clock-cells = <1>;
> - compatible = "st,quadfs";
> + compatible = "st,quadfs-d3";
> reg = <0x9107000 0x1000>;
>
> clocks = <&clk_sysin>;
> -
> - clock-output-names = "clk-s-d3-fs0-ch0",
> - "clk-s-d3-fs0-ch1",
> - "clk-s-d3-fs0-ch2",
> - "clk-s-d3-fs0-ch3";
> };
>
> clockgen-d3@9107000 {
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
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^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 10/13] ARM: dts: sti: add the spinor controller node within stih407-family
2021-03-31 20:42 ` [PATCH v3 10/13] ARM: dts: sti: add the spinor controller node within stih407-family Alain Volmat
@ 2021-08-03 12:08 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:08 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The STiH407 family (and further versions STiH410/STiH418) embedded
> a serial flash controller allowing fast access to SPI-NOR.
> This commit adds the corresponding node, relying on the st-spi-fsm
> drivers.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> v2: commit log improvement
>
> arch/arm/boot/dts/stih407-family.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> index 23a1746f3baa..21f3347a91d6 100644
> --- a/arch/arm/boot/dts/stih407-family.dtsi
> +++ b/arch/arm/boot/dts/stih407-family.dtsi
> @@ -616,6 +616,21 @@
> st,lpc-mode = <ST_LPC_MODE_CLKSRC>;
> };
>
> + spifsm: spifsm@9022000{
> + compatible = "st,spi-fsm";
> + reg = <0x9022000 0x1000>;
> + reg-names = "spi-fsm";
> + clocks = <&clk_s_c0_flexgen CLK_FLASH_PROMIP>;
> + clock-names = "emi_clk";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fsm>;
> + st,syscfg = <&syscfg_core>;
> + st,boot-device-reg = <0x8c4>;
> + st,boot-device-spi = <0x68>;
> +
> + status = "disabled";
> + };
> +
> sata0: sata@9b20000 {
> compatible = "st,ahci";
> reg = <0x9b20000 0x1000>;
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 11/13] ARM: dts: sti: disable rng11 on the stih418 platform
2021-03-31 20:42 ` [PATCH v3 11/13] ARM: dts: sti: disable rng11 on the stih418 platform Alain Volmat
@ 2021-08-03 12:08 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:08 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The rng11 is not available on the STiH418 hence is disabled in the
> stih418.dtsi
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih418.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi
> index a05e2278b448..39a249983496 100644
> --- a/arch/arm/boot/dts/stih418.dtsi
> +++ b/arch/arm/boot/dts/stih418.dtsi
> @@ -27,6 +27,10 @@
> };
>
> soc {
> + rng11: rng@8a8a000 {
> + status = "disabled";
> + };
> +
> usb2_picophy1: phy2@0 {
> compatible = "st,stih407-usb2-phy";
> reg = <0 0>;
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 12/13] ARM: dts: sti: add the thermal sensor node within stih418
2021-03-31 20:42 ` [PATCH v3 12/13] ARM: dts: sti: add the thermal sensor node within stih418 Alain Volmat
@ 2021-08-03 12:08 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:08 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> The STiH418 embedded the same sensor as the STiH410.
> This commit adds the corresponding node, relying on the st_thermal
> driver.
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> arch/arm/boot/dts/stih418.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi
> index 39a249983496..97eda4392fbe 100644
> --- a/arch/arm/boot/dts/stih418.dtsi
> +++ b/arch/arm/boot/dts/stih418.dtsi
> @@ -108,5 +108,13 @@
> assigned-clock-parents = <&clk_s_c0_pll1 0>;
> assigned-clock-rates = <200000000>;
> };
> +
> + thermal@91a0000 {
> + compatible = "st,stih407-thermal";
> + reg = <0x91a0000 0x28>;
> + clock-names = "thermal";
> + clocks = <&clk_sysin>;
> + interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
> + };
> };
> };
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v3 13/13] ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board
2021-03-31 20:42 ` [PATCH v3 13/13] ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board Alain Volmat
@ 2021-08-03 12:09 ` Patrice CHOTARD
0 siblings, 0 replies; 27+ messages in thread
From: Patrice CHOTARD @ 2021-08-03 12:09 UTC (permalink / raw)
To: Alain Volmat, Rob Herring
Cc: Arnd Bergmann, linux-arm-kernel, devicetree, linux-kernel
Hi Alain
On 3/31/21 10:42 PM, Alain Volmat wrote:
> 4KOpen (B2264) is a board based on the STMicroelectronics STiH418 soc:
> - 2GB DDR
> - HDMI
> - Ethernet 1000-BaseT
> - PCIe (mini PCIe connector)
> - MicroSD slot
> - USB2 and USB3 connectors
> - Sata
> - 40 pins GPIO header
>
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---
> v3: add 300MHz opp, add led, add ethernet pinctrl
> v2: fix bootargs (removal of console=)
> removal of rng11 node, moved into stih418.dtsi
>
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/stih418-b2264.dts | 151 ++++++++++++++++++++++++++++
> 2 files changed, 153 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/stih418-b2264.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 8e5d4ab4e75e..3c1877627e91 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1061,7 +1061,8 @@ dtb-$(CONFIG_ARCH_STI) += \
> stih407-b2120.dtb \
> stih410-b2120.dtb \
> stih410-b2260.dtb \
> - stih418-b2199.dtb
> + stih418-b2199.dtb \
> + stih418-b2264.dtb
> dtb-$(CONFIG_ARCH_STM32) += \
> stm32f429-disco.dtb \
> stm32f469-disco.dtb \
> diff --git a/arch/arm/boot/dts/stih418-b2264.dts b/arch/arm/boot/dts/stih418-b2264.dts
> new file mode 100644
> index 000000000000..a99604bebf8c
> --- /dev/null
> +++ b/arch/arm/boot/dts/stih418-b2264.dts
> @@ -0,0 +1,151 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2021 STMicroelectronics
> + * Author: Alain Volmat <avolmat@me.com>
> + */
> +/dts-v1/;
> +#include "stih418.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +/ {
> + model = "STiH418 B2264";
> + compatible = "st,stih418-b2264", "st,stih418";
> +
> + chosen {
> + stdout-path = &sbc_serial0;
> + };
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0x40000000 0xc0000000>;
> + };
> +
> + cpus {
> + cpu@0 {
> + operating-points-v2 = <&cpu_opp_table>;
> + /* u-boot puts hpen in SBC dmem at 0xb8 offset */
> + cpu-release-addr = <0x94100b8>;
> + };
> + cpu@1 {
> + operating-points-v2 = <&cpu_opp_table>;
> + /* u-boot puts hpen in SBC dmem at 0xb8 offset */
> + cpu-release-addr = <0x94100b8>;
> + };
> + cpu@2 {
> + operating-points-v2 = <&cpu_opp_table>;
> + /* u-boot puts hpen in SBC dmem at 0xb8 offset */
> + cpu-release-addr = <0x94100b8>;
> + };
> + cpu@3 {
> + operating-points-v2 = <&cpu_opp_table>;
> + /* u-boot puts hpen in SBC dmem at 0xb8 offset */
> + cpu-release-addr = <0x94100b8>;
> + };
> + };
> +
> + cpu_opp_table: opp_table {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp00 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-microvolt = <784000>;
> + };
> + opp01 {
> + opp-hz = /bits/ 64 <500000000>;
> + opp-microvolt = <784000>;
> + };
> + opp02 {
> + opp-hz = /bits/ 64 <800000000>;
> + opp-microvolt = <784000>;
> + };
> + opp03 {
> + opp-hz = /bits/ 64 <1200000000>;
> + opp-microvolt = <784000>;
> + };
> + opp04 {
> + opp-hz = /bits/ 64 <1500000000>;
> + opp-microvolt = <784000>;
> + };
> + };
> +
> + aliases {
> + ttyAS0 = &sbc_serial0;
> + ethernet0 = ðernet0;
> + };
> +
> + soc {
> + leds {
> + compatible = "gpio-leds";
> + green {
> + gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
> + default-state = "off";
> + };
> + };
> +
> + pin-controller-sbc@961f080 {
> + gmac1 {
> + rgmii1-0 {
> + st,pins {
> + rxd0 = <&pio1 4 ALT1 IN DE_IO 300 CLK_A>;
> + rxd1 = <&pio1 5 ALT1 IN DE_IO 300 CLK_A>;
> + rxd2 = <&pio1 6 ALT1 IN DE_IO 300 CLK_A>;
> + rxd3 = <&pio1 7 ALT1 IN DE_IO 300 CLK_A>;
> + rxdv = <&pio2 0 ALT1 IN DE_IO 300 CLK_A>;
> + };
> + };
> + };
> + };
> +
> + };
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +ðernet0 {
> + phy-mode = "rgmii";
> + pinctrl-0 = <&pinctrl_rgmii1 &pinctrl_rgmii1_mdio_1>;
> + st,tx-retime-src = "clkgen";
> +
> + snps,reset-gpio = <&pio0 7 0>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 10000 1000000>;
> +
> + status = "okay";
> +};
> +
> +&miphy28lp_phy {
> + phy_port0: port@9b22000 {
> + st,sata-gen = <2>; /* SATA GEN3 */
> + st,osc-rdy;
> + };
> +};
> +
> +&mmc0 {
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&pwm1 {
> + status = "okay";
> +};
> +
> +&sata0 {
> + status = "okay";
> +};
> +
> +&sbc_serial0 {
> + status = "okay";
> +};
> +
> +&spifsm {
> + status = "okay";
> +};
> +
> +&st_dwc3 {
> + status = "okay";
> +};
>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
_______________________________________________
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^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2021-08-03 12:39 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-31 20:42 [PATCH v3 00/13] Introduction of STiH418 based 4KOpen board Alain Volmat
2021-03-31 20:42 ` [PATCH v3 01/13] ARM: dts: sti: update flexgen compatible within stih418-clock Alain Volmat
2021-08-03 12:03 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 02/13] ARM: dts: sti: update flexgen compatible within stih407-clock Alain Volmat
2021-08-03 12:03 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 03/13] ARM: dts: sti: update flexgen compatible within stih410-clock Alain Volmat
2021-08-03 12:04 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 04/13] ARM: dts: sti: update clkgen-pll entries in stih407-clock Alain Volmat
2021-08-03 12:04 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 05/13] ARM: dts: sti: update clkgen-pll entries in stih410-clock Alain Volmat
2021-08-03 12:05 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 06/13] ARM: dts: sti: update clkgen-pll entries in stih418-clock Alain Volmat
2021-08-03 12:05 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 07/13] ARM: dts: sti: update clkgen-fsyn entries in stih407-clock Alain Volmat
2021-08-03 12:06 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 08/13] ARM: dts: sti: update clkgen-fsyn entries in stih410-clock Alain Volmat
2021-08-03 12:07 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 09/13] ARM: dts: sti: update clkgen-fsyn entries in stih418-clock Alain Volmat
2021-08-03 12:07 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 10/13] ARM: dts: sti: add the spinor controller node within stih407-family Alain Volmat
2021-08-03 12:08 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 11/13] ARM: dts: sti: disable rng11 on the stih418 platform Alain Volmat
2021-08-03 12:08 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 12/13] ARM: dts: sti: add the thermal sensor node within stih418 Alain Volmat
2021-08-03 12:08 ` Patrice CHOTARD
2021-03-31 20:42 ` [PATCH v3 13/13] ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board Alain Volmat
2021-08-03 12:09 ` Patrice CHOTARD
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