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From: Vladimir Murzin <vladimir.murzin@arm.com>
To: afzal mohammed <afzal.mohd.ma@gmail.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	linux-arm-kernel@lists.infradead.org,
	Alexandre Torgue <alexandre.torgue@st.com>
Subject: Re: Regression: Cortex-M w/ XIP not booting
Date: Thu, 3 Oct 2019 12:43:32 +0100	[thread overview]
Message-ID: <60589407-8740-cf96-4dcf-cf5ca57f916c@arm.com> (raw)
In-Reply-To: <20191003000459.GA5467@afzalpc>

Hi Afzal,
On 10/3/19 1:04 AM, afzal mohammed wrote:
> Hi Vladimir,
> 
> On Wed, Oct 02, 2019 at 12:55:55PM +0100, Vladimir Murzin wrote:
> 
>> Can you try diff bellow? I do not have XIP target, but non-XIP seems to
>> stay happy...
> 
> Thanks, it fixes the issue.

Great thanks! I've just sent it as a proper patch.

Vladimir

> 
> Regards
> afzal
> 
>>
>>
>> diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
>> index a7810be..4a39828 100644
>> --- a/arch/arm/kernel/head-common.S
>> +++ b/arch/arm/kernel/head-common.S
>> @@ -68,7 +68,7 @@ ENDPROC(__vet_atags)
>>   * The following fragment of code is executed with the MMU on in MMU mode,
>>   * and uses absolute addresses; this is not position independent.
>>   *
>> - *  r0  = cp#15 control register
>> + *  r0  = cp#15 control register (exc_ret for M-class)
>>   *  r1  = machine ID
>>   *  r2  = atags/dtb pointer
>>   *  r9  = processor ID
>> @@ -137,7 +137,8 @@ __mmap_switched_data:
>>  #ifdef CONFIG_CPU_CP15
>>  	.long	cr_alignment			@ r3
>>  #else
>> -	.long	0				@ r3
>> +M_CLASS(.long	exc_ret)			@ r3
>> +AR_CLASS(.long	0)				@ r3
>>  #endif
>>  	.size	__mmap_switched_data, . - __mmap_switched_data
>>  
>> diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
>> index afa350f..0fc814b 100644
>> --- a/arch/arm/kernel/head-nommu.S
>> +++ b/arch/arm/kernel/head-nommu.S
>> @@ -201,6 +201,8 @@ M_CLASS(streq	r3, [r12, #PMSAv8_MAIR1])
>>  	bic	r0, r0, #V7M_SCB_CCR_IC
>>  #endif
>>  	str	r0, [r12, V7M_SCB_CCR]
>> +	/* Pass exc_ret to __mmap_switched */
>> +	mov	r0, r10
>>  #endif /* CONFIG_CPU_CP15 elif CONFIG_CPU_V7M */
>>  	ret	lr
>>  ENDPROC(__after_proc_init)
>> diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
>> index 1448f14..efebf41 100644
>> --- a/arch/arm/mm/proc-v7m.S
>> +++ b/arch/arm/mm/proc-v7m.S
>> @@ -136,9 +136,8 @@ __v7m_setup_cont:
>>  	cpsie	i
>>  	svc	#0
>>  1:	cpsid	i
>> -	ldr	r0, =exc_ret
>> -	orr	lr, lr, #EXC_RET_THREADMODE_PROCESSSTACK
>> -	str	lr, [r0]
>> +	/* Calculate exc_ret */
>> +	orr	r10, lr, #EXC_RET_THREADMODE_PROCESSSTACK
>>  	ldmia	sp, {r0-r3, r12}
>>  	str	r5, [r12, #11 * 4]	@ restore the original SVC vector entry
>>  	mov	lr, r6			@ restore LR
>>
>> Cheers
>> Vladimir
> 


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      reply	other threads:[~2019-10-03 11:43 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-02  6:16 Regression: Cortex-M w/ XIP not booting afzal mohammed
2019-10-02 11:55 ` Vladimir Murzin
2019-10-03  0:04   ` afzal mohammed
2019-10-03 11:43     ` Vladimir Murzin [this message]

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