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bh=MHpIfrYfSW8Oruu5gZzONXfOs5cqhayPI05VEPrlFqI=; b=d1snm4c7zEswNwdThfOw5dg4aYgMkKCpFbvpT1L6bLz+c1VVZvKxC6AcbKV2bQhEhvbTlZ zTOwdGzMUR9PTGz84Y8/ERGGQMoVFzu9cJTRQEluFOtn2E/KSE+2zc51/MLXQwjPVHUgpe fzc5vpO0XekGKefm+X5cpdRennYF6Ms= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-301-eJZbxn5mNyK61ySDSBCRrA-1; Thu, 28 Oct 2021 07:28:46 -0400 X-MC-Unique: eJZbxn5mNyK61ySDSBCRrA-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id CF9359F92B; Thu, 28 Oct 2021 11:28:42 +0000 (UTC) Received: from starship (unknown [10.40.194.243]) by smtp.corp.redhat.com (Postfix) with ESMTP id 108AF5DA61; Thu, 28 Oct 2021 11:28:30 +0000 (UTC) Message-ID: <643d9c249b5863f04290a6f047ea1a2d98bd75f9.camel@redhat.com> Subject: Re: [PATCH v2 27/43] KVM: VMX: Move Posted Interrupt ndst computation out of write loop From: Maxim Levitsky To: Sean Christopherson , Marc Zyngier , Huacai Chen , Aleksandar Markovic , Paul Mackerras , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Christian Borntraeger , Janosch Frank , Paolo Bonzini Cc: James Morse , Alexandru Elisei , Suzuki K Poulose , Atish Patra , David Hildenbrand , Cornelia Huck , Claudio Imbrenda , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-mips@vger.kernel.org, kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, David Matlack , Oliver Upton , Jing Zhang Date: Thu, 28 Oct 2021 14:28:29 +0300 In-Reply-To: <20211009021236.4122790-28-seanjc@google.com> References: <20211009021236.4122790-1-seanjc@google.com> <20211009021236.4122790-28-seanjc@google.com> User-Agent: Evolution 3.36.5 (3.36.5-2.fc32) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211028_042852_358522_17CC611A X-CRM114-Status: GOOD ( 21.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 2021-10-08 at 19:12 -0700, Sean Christopherson wrote: > Hoist the CPU => APIC ID conversion for the Posted Interrupt descriptor > out of the loop to write the descriptor, preemption is disabled so the > CPU won't change, and if the APIC ID changes KVM has bigger problems. > > No functional change intended. Is preemption always disabled in vmx_vcpu_pi_load? vmx_vcpu_pi_load is called from vmx_vcpu_load, which is called indirectly from vcpu_load which is called from many ioctls, which userspace does. In these places I don't think that preemption is disabled. Best regards, Maxim Levitsky > > Signed-off-by: Sean Christopherson > --- > arch/x86/kvm/vmx/posted_intr.c | 25 +++++++++++-------------- > 1 file changed, 11 insertions(+), 14 deletions(-) > > diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c > index fea343dcc011..2b2206339174 100644 > --- a/arch/x86/kvm/vmx/posted_intr.c > +++ b/arch/x86/kvm/vmx/posted_intr.c > @@ -51,17 +51,15 @@ void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu) > goto after_clear_sn; > } > > - /* The full case. */ > + /* The full case. Set the new destination and clear SN. */ > + dest = cpu_physical_id(cpu); > + if (!x2apic_mode) > + dest = (dest << 8) & 0xFF00; > + > do { > old.control = new.control = READ_ONCE(pi_desc->control); > > - dest = cpu_physical_id(cpu); > - > - if (x2apic_mode) > - new.ndst = dest; > - else > - new.ndst = (dest << 8) & 0xFF00; > - > + new.ndst = dest; > new.sn = 0; > } while (cmpxchg64(&pi_desc->control, old.control, > new.control) != old.control); > @@ -103,15 +101,14 @@ static void __pi_post_block(struct kvm_vcpu *vcpu) > WARN(pi_desc->nv != POSTED_INTR_WAKEUP_VECTOR, > "Wakeup handler not enabled while the vCPU was blocking"); > > + dest = cpu_physical_id(vcpu->cpu); > + if (!x2apic_mode) > + dest = (dest << 8) & 0xFF00; > + > do { > old.control = new.control = READ_ONCE(pi_desc->control); > > - dest = cpu_physical_id(vcpu->cpu); > - > - if (x2apic_mode) > - new.ndst = dest; > - else > - new.ndst = (dest << 8) & 0xFF00; > + new.ndst = dest; > > /* set 'NV' to 'notification vector' */ > new.nv = POSTED_INTR_VECTOR; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel