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From: Daniel Golle <daniel@makrotopia.org>
To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Russell King <linux@armlinux.org.uk>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Lorenzo Bianconi <lorenzo@kernel.org>,
	Mark Lee <Mark-MC.Lee@mediatek.com>,
	John Crispin <john@phrozen.org>, Felix Fietkau <nbd@nbd.name>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	DENG Qingfang <dqfext@gmail.com>,
	Landen Chao <Landen.Chao@mediatek.com>,
	Sean Wang <sean.wang@mediatek.com>,
	Paolo Abeni <pabeni@redhat.com>, Jakub Kicinski <kuba@kernel.org>,
	Eric Dumazet <edumazet@google.com>,
	"David S. Miller" <davem@davemloft.net>,
	Vladimir Oltean <olteanv@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Andrew Lunn <andrew@lunn.ch>
Cc: "Jianhui Zhao" <zhaojh329@gmail.com>, "Bjørn Mork" <bjorn@mork.no>
Subject: [PATCH v3 07/12] net: ethernet: mtk_eth_soc: only write values if needed
Date: Thu, 9 Feb 2023 23:31:51 +0000	[thread overview]
Message-ID: <655926d824fac09cf188d746ae18cfb823135525.1675984550.git.daniel@makrotopia.org> (raw)
In-Reply-To: <cover.1675984550.git.daniel@makrotopia.org>

Only restart auto-negotiation and write link timer if actually
necessary.

Tested-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/net/ethernet/mediatek/mtk_sgmii.c | 24 +++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/mediatek/mtk_sgmii.c b/drivers/net/ethernet/mediatek/mtk_sgmii.c
index d7e7352041a4..9a29cff4016d 100644
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -38,20 +38,16 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
 			  const unsigned long *advertising,
 			  bool permit_pause_to_mac)
 {
+	bool mode_changed = false, changed, use_an;
 	struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
 	unsigned int rgc3, sgm_mode, bmcr;
 	int advertise, link_timer;
-	bool changed, use_an;
 
 	advertise = phylink_mii_c22_pcs_encode_advertisement(interface,
 							     advertising);
 	if (advertise < 0)
 		return advertise;
 
-	link_timer = phylink_get_link_timer_ns(interface);
-	if (link_timer < 0)
-		return link_timer;
-
 	/* Clearing IF_MODE_BIT0 switches the PCS to BASE-X mode, and
 	 * we assume that fixes it's speed at bitrate = line rate (in
 	 * other words, 1000Mbps or 2500Mbps).
@@ -77,8 +73,7 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
 	}
 
 	if (use_an) {
-		/* FIXME: Do we need to set AN_RESTART here? */
-		bmcr = SGMII_AN_RESTART | SGMII_AN_ENABLE;
+		bmcr = SGMII_AN_ENABLE;
 	} else {
 		bmcr = 0;
 	}
@@ -106,16 +101,21 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
 		regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
 				   RG_PHY_SPEED_3_125G, rgc3);
 
+		/* Setup the link timer and QPHY power up inside SGMIISYS */
+		link_timer = phylink_get_link_timer_ns(interface);
+		if (link_timer < 0)
+			return link_timer;
+
+		regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER, link_timer / 2 / 8);
+
 		mpcs->interface = interface;
+		mode_changed = true;
 	}
 
 	/* Update the advertisement, noting whether it has changed */
 	regmap_update_bits_check(mpcs->regmap, SGMSYS_PCS_ADVERTISE,
 				 SGMII_ADVERTISE, advertise, &changed);
 
-	/* Setup the link timer and QPHY power up inside SGMIISYS */
-	regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER, link_timer / 2 / 8);
-
 	/* Update the sgmsys mode register */
 	regmap_update_bits(mpcs->regmap, SGMSYS_SGMII_MODE,
 			   SGMII_REMOTE_FAULT_DIS | SGMII_SPEED_DUPLEX_AN |
@@ -123,7 +123,7 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
 
 	/* Update the BMCR */
 	regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1,
-			   SGMII_AN_RESTART | SGMII_AN_ENABLE, bmcr);
+			   SGMII_AN_ENABLE, bmcr);
 
 	/* Release PHYA power down state
 	 * Only removing bit SGMII_PHYA_PWD isn't enough.
@@ -137,7 +137,7 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
 	usleep_range(50, 100);
 	regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, 0);
 
-	return changed;
+	return changed || mode_changed;
 }
 
 static void mtk_pcs_restart_an(struct phylink_pcs *pcs)
-- 
2.39.1


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  parent reply	other threads:[~2023-02-09 23:34 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-09 23:24 [PATCH v3 00/12] net: ethernet: mtk_eth_soc: various enhancements Daniel Golle
2023-02-09 23:25 ` [PATCH v3 01/12] net: ethernet: mtk_eth_soc: add support for MT7981 SoC Daniel Golle
2023-02-09 23:27 ` [PATCH v3 02/12] dt-bindings: net: mediatek,net: add mt7981-eth binding Daniel Golle
2023-02-09 23:29 ` [PATCH v3 03/12] dt-bindings: arm: mediatek: sgmiisys: Convert to DT schema Daniel Golle
2023-02-09 23:30 ` [PATCH v3 04/12] dt-bindings: arm: mediatek: sgmiisys: add MT7981 SoC Daniel Golle
2023-02-09 23:30 ` [PATCH v3 05/12] net: ethernet: mtk_eth_soc: set MDIO bus clock frequency Daniel Golle
2023-02-09 23:33   ` Florian Fainelli
2023-02-09 23:31 ` [PATCH v3 06/12] net: ethernet: mtk_eth_soc: reset PCS state Daniel Golle
2023-02-09 23:31 ` Daniel Golle [this message]
2023-02-10 21:44   ` [PATCH v3 07/12] net: ethernet: mtk_eth_soc: only write values if needed Russell King (Oracle)
2023-02-09 23:33 ` [PATCH v3 08/12] net: ethernet: mtk_eth_soc: fix RX data corruption issue Daniel Golle
2023-02-09 23:34 ` [PATCH v3 09/12] net: ethernet: mtk_eth_soc: ppe: add support for flow accounting Daniel Golle
2023-02-09 23:34 ` [PATCH v3 10/12] net: pcs: add driver for MediaTek SGMII PCS Daniel Golle
2023-02-10 21:45   ` Russell King (Oracle)
2023-02-09 23:35 ` [PATCH v3 11/12] net: ethernet: mtk_eth_soc: switch to external PCS driver Daniel Golle
2023-02-09 23:35 ` [PATCH v3 12/12] net: dsa: mt7530: use " Daniel Golle

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