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Mon, 09 Dec 2019 16:19:09 -0800 (PST) Received: from rj-aorus.ric.broadcom.com ([192.19.228.250]) by smtp.gmail.com with ESMTPSA id b17sm1229259wrp.49.2019.12.09.16.19.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Dec 2019 16:19:07 -0800 (PST) Subject: Re: [PATCH 0/2] Add iProc IDM device support To: Marc Zyngier References: <20191202233127.31160-1-ray.jui@broadcom.com> <20191207173914.353f768d@why> <20191209183636.6d708bfd@why> From: Ray Jui Message-ID: <69ff3b8a-e99e-7128-a02a-1cac1da3eb66@broadcom.com> Date: Mon, 9 Dec 2019 16:19:02 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.1 MIME-Version: 1.0 In-Reply-To: <20191209183636.6d708bfd@why> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191209_161912_319795_250B21D1 X-CRM114-Status: GOOD ( 16.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Rayagonda Kokatanur , linux-kernel@vger.kernel.org, Rob Herring , bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/9/19 10:36 AM, Marc Zyngier wrote: > On Mon, 9 Dec 2019 10:02:53 -0800 > Ray Jui wrote: > >> On 12/7/19 9:39 AM, Marc Zyngier wrote: >>> On Mon, 2 Dec 2019 15:31:25 -0800 >>> Ray Jui wrote: >>> >>>> The Broadcom iProc IDM device allows control and monitoring of ASIC internal >>>> bus transactions. Most importantly, it can be configured to detect bus >>>> transaction timeout. In such case, critical information such as transaction >>>> address that caused the error, bus master ID of the transaction that caused >>>> the error, and etc., are made available from the IDM device. >>> >>> This seems to have many of the features of an EDAC device reporting >>> uncorrectable errors. >>> >>> Is there any reason why it is not implemented as such? >>> >>> Thanks, >>> >>> M. >>> >> >> I thought EDAC errors (in fact, in our case, that's fatal rather than >> uncorrectable) are mostly for DDR. Is my understanding incorrect? > > No, they are for HW errors in general. There is no real limitation of > scope, as far as I understand. Recently, the Annapurna guys came up > with a similar HW block, and were convinced to make it an EDAC device. > > See [1] for details. > > Thanks, > > M. > > [1] https://lore.kernel.org/linux-devicetree/1570707681-865-1-git-send-email-talel@amazon.com/ > Ah I see. It looks like memory controllers are the primary devices supported by EDAC. In addition to that, EDAC also does seem to provide a generic data structure to support other types of HW devices and error events. I'll look into this and get back. Thanks, Ray _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel