From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 371C8C432C3 for ; Thu, 14 Nov 2019 20:11:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E8191206F0 for ; Thu, 14 Nov 2019 20:11:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="kYWd/w49" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E8191206F0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=BfmOXe5ufFQC+IM1e5912N3FsJuYIRS0JwEebgoWEkM=; b=kYWd/w49zsaNzx5PREIWJ9W4kD GhOsn02Rk0pdddfL9IZ0eKybDFcnmJ0R+TZBiY1/7fJRsx9a4Y0gsRxy4YnujVVFdOZTB9D/dvOfz UMOxRg/X4H0kHyj04wmwvt5y+cRuddTdIJmopFgIWGXxOJNfgUQsd6NN8AhckdURIlrQ+9TXtvA4c 0NnoV28h4+7vzj8qYEOkC7Rk0EAhVOne0ra1Do4tKNz9NltFMcbBgt3opAg3LBdHyj4SoboT6cIUZ qAaIrcicB34Fs2p+wU6VCe+5DPJ6KeWpKaa9G3LD9bavUWnfYONe2rx4HNKWY/3E/FoybsiFxduvL t5laK+Qg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iVLSI-00008o-6m; Thu, 14 Nov 2019 20:11:02 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iVLRy-0008Ly-IQ for linux-arm-kernel@lists.infradead.org; Thu, 14 Nov 2019 20:10:49 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5C0EE1A048C; Thu, 14 Nov 2019 21:10:41 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 443691A009D; Thu, 14 Nov 2019 21:10:41 +0100 (CET) Received: from fsr-ub1864-112.ea.freescale.net (fsr-ub1864-112.ea.freescale.net [10.171.82.98]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 3216C2063D; Thu, 14 Nov 2019 21:10:40 +0100 (CET) From: Leonard Crestez To: Georgi Djakov , Rob Herring , Chanwoo Choi Subject: [PATCH RFC v6 1/9] dt-bindings: interconnect: Add bindings for imx8m noc Date: Thu, 14 Nov 2019 22:09:48 +0200 Message-Id: <6db2ce55ee62dd8548aa8e1e0ecdf8c06eda868f.1573761527.git.leonard.crestez@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191114_121045_420230_C88443F0 X-CRM114-Status: UNSURE ( 9.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , =?UTF-8?q?Artur=20=C5=9Awigo=C5=84?= , Jacky Bai , "Rafael J. Wysocki" , Viresh Kumar , Michael Turquette , Angus Ainslie , MyungJoo Ham , Abel Vesa , Anson Huang , Krzysztof Kozlowski , Matthias Kaehlcke , linux-imx@nxp.com, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Martin Kepplinger , Silvano di Ninno , linux-arm-kernel@lists.infradead.org, Dong Aisheng , Saravana Kannan , Stephen Boyd , Kyungmin Park , kernel@pengutronix.de, Fabio Estevam , Shawn Guo , Alexandre Bailon MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add initial dt bindings for the interconnects inside i.MX chips. Multiple external IPs are involved but SOC integration means the software controllable interfaces are very similar. Main NOC node acts as interconnect provider if #interconnect-cells is present. Multiple interconnects can be present, each with their own OPP table. Signed-off-by: Leonard Crestez --- .../bindings/interconnect/fsl,imx8m-noc.yaml | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml diff --git a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml new file mode 100644 index 000000000000..5cd94185fec3 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic i.MX bus frequency device + +maintainers: + - Leonard Crestez + +description: | + The i.MX SoC family has multiple buses for which clock frequency (and + sometimes voltage) can be adjusted. + + Some of those buses expose register areas mentioned in the memory maps as GPV + ("Global Programmers View") but not all. Access to this area might be denied + for normal (non-secure) world. + + The buses are based on externally licensed IPs such as ARM NIC-301 and + Arteris FlexNOC but DT bindings are specific to the integration of these bus + interconnect IPs into imx SOCs. + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx8mn-nic + - fsl,imx8mm-nic + - fsl,imx8mq-nic + - const: fsl,imx8m-nic + - items: + - enum: + - fsl,imx8mn-noc + - fsl,imx8mm-noc + - fsl,imx8mq-noc + - const: fsl,imx8m-noc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + operating-points-v2: true + opp-table: true + + devfreq: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: + Phandle to another devfreq device to match OPPs with by using the + passive governor. + + '#interconnect-cells': + description: + If specified then also act as an interconnect provider. Should only be + set once per soc on main noc. + const: 1 + + fsl,scalable-node-ids: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Array of node ids for scalable nodes. Uses same numeric identifier + namespace as the consumer "interconnects" binding. + + fsl,scalable-nodes: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Array of phandles to scalable nodes. Must be of same length as + fsl,scalable-node-ids. + +required: + - compatible + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + noc: interconnect@32700000 { + compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc"; + reg = <0x32700000 0x100000>; + clocks = <&clk IMX8MQ_CLK_NOC>; + #interconnect-cells = <1>; + fsl,scalable-node-ids = , + ; + fsl,scalable-nodes = <&noc>, + <&ddrc>; + operating-points-v2 = <&noc_opp_table>; + + noc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-133M { + opp-hz = /bits/ 64 <133333333>; + }; + opp-800M { + opp-hz = /bits/ 64 <800000000>; + }; + }; + }; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel