From: Robin Murphy <robin.murphy@arm.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
Chen-Yu Tsai <wens@csie.org>
Cc: devicetree@vger.kernel.org, Yong Deng <yong.deng@magewell.com>,
Arnd Bergmann <arnd@arndb.de>,
dri-devel@lists.freedesktop.org,
Dave Martin <dave.martin@arm.com>,
Paul Kocialkowski <paul.kocialkowski@bootlin.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Georgi Djakov <georgi.djakov@linaro.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/7] dt-bindings: bus: Add binding for the Allwinner MBUS controller
Date: Tue, 12 Feb 2019 18:53:11 +0000 [thread overview]
Message-ID: <76a7fe92-6847-b668-2d0e-1eee1d291fc3@arm.com> (raw)
In-Reply-To: <43f965dae8b0ba8dffd3af478c2836c17feaa18b.1549897336.git-series.maxime.ripard@bootlin.com>
On 11/02/2019 15:02, Maxime Ripard wrote:
> The MBUS controller drives the MBUS that other devices in the SoC will
> use to perform DMA. It also has a register interface that allows to
> monitor and control the bandwidth and priorities for masters on that
> bus.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
> ---
> Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt | 36 +++++++-
> 1 file changed, 36 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt
> new file mode 100644
> index 000000000000..e72b7ac9e359
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt
> @@ -0,0 +1,36 @@
> +Allwinner Memory Bus (MBUS) controller
> +
> +The MBUS controller drives the MBUS that other devices in the SoC will
> +use to perform DMA. It also has a register interface that allows to
> +monitor and control the bandwidth and priorities for masters on that
> +bus.
> +
> +Required properties:
> + - compatible: Must be one of:
> + - allwinner,sun5i-a13-mbus
> + - reg: Offset and length of the register set for the controller
> + - clocks: phandle to the clock driving the controller
> + - dma-ranges: see booting-without-of.txt
Nit: this is a standard property in DTSpec, so it's probably better to
refer to that rather than Linux-specific documentation.
Robin.
> + - #interconnect-cells: Must be one, with the argument being the MBUS
> + port ID
> +
> +Each device having to perform their DMA through the MBUS must have the
> +interconnects and interconnect-names properties set to the MBUS
> +controller and with "dma" as the interconnect name.
> +
> +Example:
> +
> +mbus: dram-controller@1c01000 {
> + compatible = "allwinner,sun5i-a13-mbus";
> + reg = <0x01c01000 0x1000>;
> + clocks = <&ccu CLK_MBUS>;
> + dma-ranges = <0x00000000 0x40000000 0x20000000>;
> + #interconnect-cells = <1>;
> +};
> +
> +fe0: display-frontend@1e00000 {
> + compatible = "allwinner,sun5i-a13-display-frontend";
> + ...
> + interconnects = <&mbus 19>;
> + interconnect-names = "dma";
> +};
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-02-12 18:53 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-11 15:02 [PATCH v3 0/7] sunxi: Add DT representation for the MBUS controller Maxime Ripard
2019-02-11 15:02 ` [PATCH v3 1/7] dt-bindings: interconnect: Add a dma interconnect name Maxime Ripard
2019-03-01 17:48 ` Georgi Djakov
2019-03-05 15:53 ` Maxime Ripard
2019-03-05 16:14 ` Robin Murphy
2019-03-07 15:15 ` Georgi Djakov
2019-03-07 15:47 ` Maxime Ripard
2019-03-07 16:09 ` Chen-Yu Tsai
2019-03-11 10:11 ` Maxime Ripard
2019-03-11 14:11 ` Chen-Yu Tsai
2019-03-13 11:48 ` Georgi Djakov
2019-02-11 15:02 ` [PATCH v3 2/7] dt-bindings: bus: Add binding for the Allwinner MBUS controller Maxime Ripard
2019-02-12 18:53 ` Robin Murphy [this message]
2019-02-11 15:02 ` [PATCH v3 3/7] of: address: Add parent pointer to the __of_translate_address args Maxime Ripard
2019-02-12 18:02 ` Robin Murphy
2019-02-11 15:02 ` [PATCH v3 4/7] of: address: Add support for the parent DMA bus Maxime Ripard
2019-02-12 18:15 ` Robin Murphy
2019-02-11 15:02 ` [PATCH v3 5/7] drm/sun4i: Rely on dma interconnect for our RAM offset Maxime Ripard
2019-02-12 18:46 ` Robin Murphy
2019-02-13 15:41 ` Maxime Ripard
2019-02-13 16:40 ` Robin Murphy
2019-02-19 10:55 ` Maxime Ripard
2019-03-05 16:11 ` Robin Murphy
2019-02-11 15:02 ` [PATCH v3 6/7] clk: sunxi-ng: sun5i: Export the MBUS clock Maxime Ripard
2019-02-11 15:02 ` [PATCH v3 7/7] ARM: dts: sun5i: Add the MBUS controller Maxime Ripard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=76a7fe92-6847-b668-2d0e-1eee1d291fc3@arm.com \
--to=robin.murphy@arm.com \
--cc=arnd@arndb.de \
--cc=dave.martin@arm.com \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=frowand.list@gmail.com \
--cc=georgi.djakov@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=maxime.ripard@bootlin.com \
--cc=paul.kocialkowski@bootlin.com \
--cc=robh+dt@kernel.org \
--cc=thomas.petazzoni@bootlin.com \
--cc=wens@csie.org \
--cc=yong.deng@magewell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).