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Thu, 13 May 2021 20:10:15 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 14 May 2021 11:10:13 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 14 May 2021 11:10:13 +0800 Message-ID: <7a7a07adedf5d3f430fecf81aed35c6321e5b634.camel@mediatek.com> Subject: Re: [PATCH v16 3/7] soc: mediatek: SVS: introduce MTK SVS engine From: Roger Lu To: Guenter Roeck CC: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd , Philipp Zabel , Fan Chen , HenryC Chen , YT Lee , Xiaoqing Liu , "Charles Yang" , Angus Lin , "Mark Rutland" , Nishanth Menon , , , , , , Date: Fri, 14 May 2021 11:10:13 +0800 In-Reply-To: <20210506045115.GA767398@roeck-us.net> References: <20210428065440.3704-1-roger.lu@mediatek.com> <20210428065440.3704-4-roger.lu@mediatek.com> <20210506045115.GA767398@roeck-us.net> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210513_201030_073396_4DCE3760 X-CRM114-Status: GOOD ( 17.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Guenter, Sorry for the late reply and thanks for the notice. On Wed, 2021-05-05 at 21:51 -0700, Guenter Roeck wrote: > On Wed, Apr 28, 2021 at 02:54:36PM +0800, Roger Lu wrote: > > The Smart Voltage Scaling(SVS) engine is a piece of hardware > > which calculates suitable SVS bank voltages to OPP voltage table. > > Then, DVFS driver could apply those SVS bank voltages to PMIC/Buck > > when receiving OPP_EVENT_ADJUST_VOLTAGE. > > > > Signed-off-by: Roger Lu > > --- > > drivers/soc/mediatek/Kconfig | 10 + > > drivers/soc/mediatek/Makefile | 1 + > > drivers/soc/mediatek/mtk-svs.c | 1723 > > ++++++++++++++++++++++++++++++++ > > 3 files changed, 1734 insertions(+) > > create mode 100644 drivers/soc/mediatek/mtk-svs.c > > > > [ ... ] > > > + > > + svsp_irq = irq_of_parse_and_map(svsp->dev->of_node, 0); > > + ret = devm_request_threaded_irq(svsp->dev, svsp_irq, NULL, > > svs_isr, > > + svsp->irqflags, svsp->name, > > svsp); > > 0-day reports: > > drivers/soc/mediatek/mtk-svs.c:1663:7-32: ERROR: > Threaded IRQ with no primary handler requested without > IRQF_ONESHOT > > I would be a bit concerned about this. There is no primary (hard) > interrupt handler, meaning the hard interrupt may be re-enabled after > the default hard interrupt handler runs. This might result in endless > interrupts. Oh, we add IRQF_ONESHOT in "svs_get_svs_mt8183_platform_data()" for threaded irq. So, please kindly let us know if we need to set more flags or any other potential risks we should be aware. Thanks in advance. > > Guenter _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel