From: Shaokun Zhang <zhangshaokun@hisilicon.com>
To: Will Deacon <will@kernel.org>, John Garry <john.garry@huawei.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
linux-arm-kernel@lists.infradead.org,
Hanjun Guo <guohanjun@huawei.com>
Subject: Re: [PATCH] drivers/perf: hisi: update the sccl_id/ccl_id for certain HiSilicon platform
Date: Fri, 8 Nov 2019 09:25:29 +0800 [thread overview]
Message-ID: <7b588bde-f835-4ead-dff9-1847ea111697@hisilicon.com> (raw)
In-Reply-To: <20191107130957.GA12929@willie-the-truck>
Hi Will,
On 2019/11/7 21:09, Will Deacon wrote:
> On Thu, Nov 07, 2019 at 01:04:34PM +0000, John Garry wrote:
>>>>>>> On Thu, Nov 07, 2019 at 03:56:04PM +0800, Shaokun Zhang wrote:
>>>>>>> [I prefer Mark's version, so please reply to indicate whether or not it
>>>>>>> works for you]
>>>>>>
>>>>>> Replying on Shaokun's behalf as he appears offline now.
>>>>>>
>>>>>> In response to "> If TSV110 is always MT, ":
>>>>>>
>>>>>> It isn't. There are 2 spins of Huawei Kunpeng 920 SoC which includes
>>>>>> TaishanV110 aka TSV110: one has the MT bit set and the other without.
>>>>>
>>>>> Just to check, for the non-MT variant is the SCCL/CCL assignment
>>>>> Aff2/Aff1 as with other non-MT parts?
>>>>
>>>> We don't support any other non-MT parts for this driver.
>>>
>>> The driver claimed to support non-MT parts before TSV110 came around, so that
>>> statement confuses me.
>>
>> A couple of points on this:
>>
>> - We gave up on upstreaming support in this driver for the predecessor SoC,
>> which included an A72. You may remember the infamous djtag bus.
>>
>> - The wording in the comment "If multi-threading is supported, On Huawei
>> Kunpeng 920 SoC " is misleading, as it implies that the part found in Huawei
>> Kunpeng 920 is MT, which it isn't always.
>>
>>>
>>> For a non-MT TSV110, is Aff2 the SCCL and Aff1 the CCL?
>>
>> Yes,
>>
>> That's what the
>>> existing code (and Shaokun's patch) assumed.
>>
>> well I'm going with that as well. Shaokun can confirm the layout.
>
> I'll queue Shaokun's patch for now, since I want to get this to Catalin
Thanks Will.
> tomorrow for 5.5 after spending the night in -next. We can always simplify
> the logic later if Mark's patch ends up working out.
I have checked that it has been in your for-next/perf branch. I will simplify
it later as Mark's suggestion.
Or if it is permitted, I can post v2 and simplify this.
Thanks,
Shaokun
>
> Thanks,
>
> Will
>
> .
>
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next prev parent reply other threads:[~2019-11-08 1:25 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-07 7:56 [PATCH] drivers/perf: hisi: update the sccl_id/ccl_id for certain HiSilicon platform Shaokun Zhang
2019-11-07 11:31 ` Mark Rutland
2019-11-07 11:40 ` Will Deacon
2019-11-07 11:50 ` John Garry
2019-11-07 11:56 ` Mark Rutland
2019-11-07 12:06 ` John Garry
2019-11-07 12:11 ` Mark Rutland
2019-11-07 13:04 ` John Garry
2019-11-07 13:09 ` Will Deacon
2019-11-08 1:25 ` Shaokun Zhang [this message]
2019-11-08 9:49 ` Will Deacon
2019-11-09 2:51 ` [PATCH] drivers/perf: hisi: Simplify hisi_read_sccl_and_ccl_id and its comment Shaokun Zhang
2019-11-11 13:49 ` John Garry
2019-11-12 0:50 ` Shaokun Zhang
2019-11-08 1:18 ` [PATCH] drivers/perf: hisi: update the sccl_id/ccl_id for certain HiSilicon platform Shaokun Zhang
2019-11-08 1:15 ` Shaokun Zhang
2019-11-08 1:28 ` Shaokun Zhang
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