From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D4DDC433ED for ; Thu, 13 May 2021 11:00:25 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 92FFF6143E for ; Thu, 13 May 2021 11:00:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 92FFF6143E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=HqzqfcLLcjzCGxIc1+zkuEKvHCE5PSlIghnQH+ct4Fg=; b=bsr8k/ptK2E3b+sRgvNyCcHcN PO6CcFaGeXfY/F8IJ8lEMpikX0oCzuk2GHqqVe3HUUDjeyGEfU+D1ntJr8GUfoRrP4aGVPl3YvSa/ mDbNcegga7dKhJtFYgIEmcsNepAqh3KdYscz2O1lsZKFf4uEiMI6uUOmuAaEx/Sern2cCrqycYE87 K3HOqadIe+ZVBG37lzowYbvDsTBnALuySX1ydKo0vGqv0Uuz1Q93jfFx/fVtibTOjXyoKQyRYsRYP lodS38iIpT2Jvu6LSh1cP0WX9q6aLciyh66kIv76zGIHNam3DwLog8MoTjuUu1l34Hg13Gp557UPw 6IUwpTxpw==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lh92N-005NFB-IJ; Thu, 13 May 2021 10:57:51 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lh92L-005NEq-FO for linux-arm-kernel@desiato.infradead.org; Thu, 13 May 2021 10:57:49 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding: Content-Type:In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To: Subject:Sender:Reply-To:Content-ID:Content-Description; bh=++yXu5DA3foNlpuIKyUnnbbfotrVmvFtGGOyESBLdRs=; b=dAEd1kE6/pqnOfNRpcDJqipwEs teLfYqfAB4K9hCDuGe2W87R7L/1i+2hMt+8hHalL56iifdUgH6b94GDXQEHAteOnousrWtsl1eD0c VMAAKiI/4LkBfNH6ft33DEpH3xJFj4kdCKfMmiw4ivnqe0jtDW2BWRfqWDFXcXYNRqIT550Gn4pZO M1LpLJB9M+caYYXykuP2ghZsmZ/wnkC2EGDfTqzlO3Ej2C/0DW4zQAPvzW6jo2qOpoDCVwaUg6AQb ghIfBDp73isIYzpw9x0iJhIHJVX9MBctF8Asi7F9oS+CtktQL2uFLiybXI5KqUiinb+UCBQnIMAJ4 YcP7ObaA==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lh92I-00BBML-6S for linux-arm-kernel@lists.infradead.org; Thu, 13 May 2021 10:57:48 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D1D2F1476; Thu, 13 May 2021 03:57:42 -0700 (PDT) Received: from [192.168.1.179] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 487D43F73B; Thu, 13 May 2021 03:57:40 -0700 (PDT) Subject: Re: [PATCH v11 2/6] arm64: kvm: Introduce MTE VM feature To: Catalin Marinas Cc: Marc Zyngier , Will Deacon , James Morse , Julien Thierry , Suzuki K Poulose , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Dave Martin , Mark Rutland , Thomas Gleixner , qemu-devel@nongnu.org, Juan Quintela , "Dr. David Alan Gilbert" , Richard Henderson , Peter Maydell , Haibo Xu , Andrew Jones References: <20210416154309.22129-1-steven.price@arm.com> <20210416154309.22129-3-steven.price@arm.com> <20210428170705.GB4022@arm.com> <329286e8-a8f3-ea1a-1802-58813255a4a5@arm.com> <20210507182538.GF26528@arm.com> <20210510183506.GA10910@arm.com> <20210512174502.GC12391@arm.com> From: Steven Price Message-ID: <7c1cb7c8-6ab4-62bd-fa17-2fb7be6d7f09@arm.com> Date: Thu, 13 May 2021 11:57:39 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210512174502.GC12391@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210513_035746_370531_29021A71 X-CRM114-Status: GOOD ( 55.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/05/2021 18:45, Catalin Marinas wrote: > On Wed, May 12, 2021 at 04:46:48PM +0100, Steven Price wrote: >> On 10/05/2021 19:35, Catalin Marinas wrote: >>> On Fri, May 07, 2021 at 07:25:39PM +0100, Catalin Marinas wrote: >>>> On Thu, May 06, 2021 at 05:15:25PM +0100, Steven Price wrote: >>>>> On 04/05/2021 18:40, Catalin Marinas wrote: >>>>>> On Thu, Apr 29, 2021 at 05:06:41PM +0100, Steven Price wrote: >>>>>>> Given the changes to set_pte_at() which means that tags are restored from >>>>>>> swap even if !PROT_MTE, the only race I can see remaining is the creation of >>>>>>> new PROT_MTE mappings. As you mention an attempt to change mappings in the >>>>>>> VMM memory space should involve a mmu notifier call which I think serialises >>>>>>> this. So the remaining issue is doing this in a separate address space. >>>>>>> >>>>>>> So I guess the potential problem is: >>>>>>> >>>>>>> * allocate memory MAP_SHARED but !PROT_MTE >>>>>>> * fork() >>>>>>> * VM causes a fault in parent address space >>>>>>> * child does a mprotect(PROT_MTE) >>>>>>> >>>>>>> With the last two potentially racing. Sadly I can't see a good way of >>>>>>> handling that. > [...] >>> Options: >>> >>> 1. Change the mte_sync_tags() code path to set the flag after clearing >>> and avoid reading stale tags. We document that mprotect() on >>> MAP_SHARED may lead to tag loss. Maybe we can intercept this in the >>> arch code and return an error. >> >> This is the best option I've come up with so far - but it's not a good >> one! We can replace the set_bit() with a test_and_set_bit() to catch the >> race after it has occurred - but I'm not sure what we can do about it >> then (we've already wiped the data). Returning an error doesn't seem >> particularly useful at that point, a message in dmesg is about the best >> I can come up with. > > What I meant about intercepting is on something like > arch_validate_flags() to prevent VM_SHARED and VM_MTE together but only > for mprotect(), not mmap(). However, arch_validate_flags() is currently > called on both mmap() and mprotect() paths. I think even if we were to restrict mprotect() there would be corner cases around swapping in. For example if a page mapped VM_SHARED|VM_MTE is faulted simultaneously in both processes then we have the same situation: * with test_and_set_bit() one process could potentially see the tags before they have been restored - i.e. a data leak. * with separated test and set then one process could write to the tags before the second restore has completed causing a lost update. Obviously completely banning VM_SHARED|VM_MTE might work, but I don't think that's a good idea. > We can't do much in set_pte_at() to prevent the race with only a single > bit. > >>> 2. Figure out some other locking in the core code. However, if >>> mprotect() in one process can race with a handle_pte_fault() in >>> another, on the same shared mapping, it's not trivial. >>> filemap_map_pages() would take the page lock before calling >>> do_set_pte(), so mprotect() would need the same page lock. >> >> I can't see how this is going to work without harming the performance of >> non-MTE work. Ultimately we're trying to add some sort of locking for >> two (mostly) unrelated processes doing page table operations, which will >> hurt scalability. > > Another option is to have an arch callback to force re-faulting on the > pte. That means we don't populate it back after the invalidation in the > change_protection() path. We could do this only if the new pte is tagged > and the page doesn't have PG_mte_tagged. The faulting path takes the > page lock IIUC. As above - I don't think this race is just on the change_protection() path. > Well, at least for stage 1, I haven't thought much about stage 2. > >>> 3. Use another PG_arch_3 bit as a lock to spin on in the arch code (i.e. >>> set it around the other PG_arch_* bit setting). >> >> This is certainly tempting, although sadly the existing >> wait_on_page_bit() is sleeping - so this would either be a literal spin, >> or we'd need to implement a new non-sleeping wait mechanism. > > Yeah, it would have to be a custom spinning mechanism, something like: > > /* lock the page */ > while (test_and_set_bit(PG_arch_3, &page->flags)) > smp_cond_load_relaxed(&page->flags, !(VAL & PG_arch_3)); > ... > /* unlock the page */ > clear_bit(PG_arch_3, &page->flags); Presumably we'd also need to ensure interrupts are disabled to ensure we're not pre-empted in the middle and potentially deadlock. It's doable, but I'd prefer not to invent a new lock type if possible. >> 4. Sledgehammer locking in mte_sync_page_tags(), add a spinlock only for >> the MTE case where we have to sync tags (see below). What the actual >> performance impact of this is I've no idea. It could certainly be bad >> if there are a lot of pages with MTE enabled, which sadly is exactly >> the case if KVM is used with MTE :( >> >> --->8---- >> diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c >> index 0d320c060ebe..389ad40256f6 100644 >> --- a/arch/arm64/kernel/mte.c >> +++ b/arch/arm64/kernel/mte.c >> @@ -25,23 +25,33 @@ >> u64 gcr_kernel_excl __ro_after_init; >> static bool report_fault_once = true; >> +static spinlock_t tag_sync_lock; >> static void mte_sync_page_tags(struct page *page, pte_t *ptep, bool check_swap, >> bool pte_is_tagged) >> { >> pte_t old_pte = READ_ONCE(*ptep); >> + if (!is_swap_pte(old_pte) && !pte_is_tagged) >> + return; >> + >> + spin_lock_irqsave(&tag_sync_lock, flags); >> + >> + /* Recheck with the lock held */ >> + if (test_bit(PG_mte_tagged, &page->flags)) >> + goto out; > > Can we skip the lock if the page already has the PG_mte_tagged set? > That's assuming that we set the flag only after clearing the tags. The > normal case where mprotect() is called on a page already mapped with > PROT_MTE would not be affected. > It was missing from the diff context (sorry, should have double checked that), but I was keeping the check in mte_sync_tags(): void mte_sync_tags(pte_t *ptep, pte_t pte) { struct page *page = pte_page(pte); long i, nr_pages = compound_nr(page); bool check_swap = nr_pages == 1; bool pte_is_tagged = pte_tagged(pte); unsigned long flags; /* Early out if there's nothing to do */ if (!check_swap && !pte_is_tagged) return; /* if PG_mte_tagged is set, tags have already been initialised */ for (i = 0; i < nr_pages; i++, page++) { if (!test_bit(PG_mte_tagged, &page->flags)) mte_sync_page_tags(page, ptep, check_swap, pte_is_tagged); } } So the hit is only taken if !PG_mte_tagged - hence the "recheck" comment in mte_sync_page_tags() once the lock is held. I guess if I'm going this route it would make sense to refactor this to be a bit clearer. Steve _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel