From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] arm64: dts: renesas: condor: add SCIF0 pins
Date: Fri, 9 Mar 2018 15:07:51 +0300 [thread overview]
Message-ID: <7d9d311f-7e0f-aea5-d7c4-afe1995c6f7f@cogentembedded.com> (raw)
In-Reply-To: <88e52531-e538-8685-110a-1a2e79a3fe49@cogentembedded.com>
Add the (previously omitted) SCIF0 pin data to the Condor board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -49,7 +49,22 @@
clock-frequency = <32768>;
};
+&pfc {
+ scif0_pins: scif0 {
+ groups = "scif0_data";
+ function = "scif0";
+ };
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_b";
+ function = "scif_clk";
+ };
+};
+
&scif0 {
+ pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
next prev parent reply other threads:[~2018-03-09 12:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-09 12:04 [PATCH 0/3] Add R8A77980/Condor PFC support Sergei Shtylyov
2018-03-09 12:06 ` [PATCH 1/3] arm64: dts: renesas: r8a77980: add " Sergei Shtylyov
2018-03-09 12:36 ` Geert Uytterhoeven
2018-03-09 12:07 ` Sergei Shtylyov [this message]
2018-03-09 12:39 ` [PATCH 2/3] arm64: dts: renesas: condor: add SCIF0 pins Geert Uytterhoeven
2018-03-09 12:09 ` [PATCH 3/3] arm64: dts: renesas: condor: add EtherAVB pins Sergei Shtylyov
2018-03-09 12:44 ` Geert Uytterhoeven
2018-03-09 17:26 ` Sergei Shtylyov
2018-03-13 18:46 ` [PATCH 0/3] Add R8A77980/Condor PFC support Simon Horman
2018-04-20 17:33 ` Sergei Shtylyov
2018-04-24 9:20 ` Simon Horman
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