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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2020-12-21 at 15:31 -0700, Rob Herring wrote: > On Thu, Dec 17, 2020 at 05:59:25PM +0800, Liu Ying wrote: > > This patch adds bindings for i.MX8qm/qxp display pixel link. > > > > Signed-off-by: Liu Ying > > --- > > .../display/bridge/fsl,imx8qxp-pixel-link.yaml | 128 +++++++++++++++++++++ > > 1 file changed, 128 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > > new file mode 100644 > > index 00000000..fd24a0e > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > > @@ -0,0 +1,128 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Ffsl%2Cimx8qxp-pixel-link.yaml%23&data=04%7C01%7Cvictor.liu%40nxp.com%7C2c8f001f28de46450bba08d8a60032d5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637441867070310997%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=Qg5M4UJqHKJy5W4%2FB2hOpeEu8mHtp8rXcyN35TCUukw%3D&reserved=0 > > +$schema: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7Cvictor.liu%40nxp.com%7C2c8f001f28de46450bba08d8a60032d5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637441867070310997%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=Zjvx9NBDFvqBxXqJItSP6smPdWsQUFYssJpNyVr48uE%3D&reserved=0 > > + > > +title: Freescale i.MX8qm/qxp Display Pixel Link > > + > > +maintainers: > > + - Liu Ying > > + > > +description: | > > + The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard > > + asynchronous linkage between pixel sources(display controller or > > + camera module) and pixel consumers(imaging or displays). > > + It consists of two distinct functions, a pixel transfer function and a > > + control interface. Multiple pixel channels can exist per one control channel. > > + This binding documentation is only for pixel links whose pixel sources are > > + display controllers. > > Perhaps some information about how this 'device' is accessed because you > have no control interface. The i.MX8qm/qxp Display Pixel Link is controlled by SCU firmare. Will add the information. > > > + > > +properties: > > + compatible: > > + enum: > > + - fsl,imx8qm-dc-pixel-link > > + - fsl,imx8qxp-dc-pixel-link > > + > > + ports: > > + type: object > > + description: | > > + A node containing pixel link input & output port nodes with endpoint > > + definitions as documented in > > + Documentation/devicetree/bindings/media/video-interfaces.txt > > + Documentation/devicetree/bindings/graph.txt > > + > > + properties: > > + '#address-cells': > > + const: 1 > > + > > + '#size-cells': > > + const: 0 > > + > > + port@0: > > + type: object > > + description: The pixel link input port node from upstream video source. > > + > > + properties: > > + reg: > > + const: 0 > > + > > + required: > > + - reg > > You can drop 'reg' parts. Will drop the 'required' parts for 'reg'. Also, will drop the '#address-cells' and '#size-cells' parts if no objections. Thanks, Liu Ying > > > + > > + patternProperties: > > + "^port@[1-4]$": > > + type: object > > + description: The pixel link output port node to downstream bridge. > > + > > + properties: > > + reg: > > + enum: [ 1, 2, 3, 4 ] > > + > > + required: > > + - reg > > + > > + required: > > + - "#address-cells" > > + - "#size-cells" > > + - port@0 > > + > > + anyOf: > > + - required: > > + - port@1 > > + - required: > > + - port@2 > > + - required: > > + - port@3 > > + - required: > > + - port@4 > > + > > + additionalProperties: false > > + > > +required: > > + - compatible > > + - ports > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + dc0-pixel-link0 { > > + compatible = "fsl,imx8qxp-dc-pixel-link"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + /* from dc0 pixel combiner channel0 */ > > + port@0 { > > + reg = <0>; > > + > > + dc0_pixel_link0_dc0_pixel_combiner_ch0: endpoint { > > + remote-endpoint = <&dc0_pixel_combiner_ch0_dc0_pixel_link0>; > > + }; > > + }; > > + > > + /* to PXL2DPIs in MIPI/LVDS combo subsystems */ > > + port@1 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <1>; > > + > > + dc0_pixel_link0_mipi_lvds_0_pxl2dpi: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&mipi_lvds_0_pxl2dpi_dc0_pixel_link0>; > > + }; > > + > > + dc0_pixel_link0_mipi_lvds_1_pxl2dpi: endpoint@1 { > > + reg = <1>; > > + remote-endpoint = <&mipi_lvds_1_pxl2dpi_dc0_pixel_link0>; > > + }; > > + }; > > + > > + /* to imaging subsystem */ > > + port@4 { > > + reg = <4>; > > + }; > > + }; > > + }; > > -- > > 2.7.4 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel