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Tue, 15 Jun 2021 13:48:14 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 15 Jun 2021 13:48:14 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 15 Jun 2021 13:48:14 -0500 Received: from [10.250.35.153] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15FImEb8084161; Tue, 15 Jun 2021 13:48:14 -0500 Subject: Re: [PATCH v4 2/3] arm64: dts: ti: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication To: Aswath Govindraju CC: Vignesh Raghavendra , Lokesh Vutla , Kishon Vijay Abraham I , Nishanth Menon , Tero Kristo , Rob Herring , , , References: <20210615174325.22853-1-a-govindraju@ti.com> <20210615174325.22853-3-a-govindraju@ti.com> From: Suman Anna Message-ID: <8206a84c-b5d8-4428-6501-7e114798b1bb@ti.com> Date: Tue, 15 Jun 2021 13:48:14 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210615174325.22853-3-a-govindraju@ti.com> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210615_114819_869398_6F8CB149 X-CRM114-Status: GOOD ( 17.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/15/21 12:43 PM, Aswath Govindraju wrote: > The final 128KB in SRAM is reserved by default for DMSC-lite code and > secure proxy communication buffer. The memory region used for DMSC-lite > code can be optionally freed up by secure firmware API[1]. However, the > buffer for secure proxy communication is not configurable. This default > hardware configuration is unique for AM64. > > Therefore, indicate the area reserved for DMSC-lite code and secure proxy > communication buffer in the oc_sram device tree node. > > [1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover > > Signed-off-by: Aswath Govindraju Reviewed-by: Suman Anna > --- > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > index 693fe24e7f7a..6a883f4349cb 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > @@ -27,6 +27,14 @@ > tfa-sram@0 { > reg = <0x0 0x1c000>; > }; > + > + dmsc-sram@1e0000 { > + reg = <0x1e0000 0x1c000>; > + }; > + > + sproxy-sram@1fc000 { > + reg = <0x1fc000 0x4000>; > + }; > }; > > main_conf: syscon@43000000 { > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel