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Fri, 26 Aug 2022 19:35:13 +0100 Date: Fri, 26 Aug 2022 19:35:12 +0100 Message-ID: <871qt2x38f.wl-maz@kernel.org> From: Marc Zyngier To: Frank Li Cc: Rob Herring , "tglx@linutronix.de" , "krzysztof.kozlowski+dt@linaro.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kw@linux.com" , "bhelgaas@google.com" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-pci@vger.kernel.org" , Peng Fan , Aisheng Dong , "jdmason@kudzu.us" , "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "kishon@ti.com" , "lorenzo.pieralisi@arm.com" , "ntb@lists.linux.dev" , "lznuaa@gmail.com" Subject: Re: [EXT] Re: [PATCH v7 3/4] dt-bindings: irqchip: imx mu work as msi controller In-Reply-To: References: <20220822155130.2491006-1-Frank.Li@nxp.com> <20220822155130.2491006-4-Frank.Li@nxp.com> <20220825212130.GA1705214-robh@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: frank.li@nxp.com, robh@kernel.org, tglx@linutronix.de, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kw@linux.com, bhelgaas@google.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, peng.fan@nxp.com, aisheng.dong@nxp.com, jdmason@kudzu.us, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, ntb@lists.linux.dev, lznuaa@gmail.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220826_113519_572336_15852E29 X-CRM114-Status: GOOD ( 32.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 25 Aug 2022 22:42:38 +0100, Frank Li wrote: > > > > > -----Original Message----- > > From: Rob Herring > > Sent: Thursday, August 25, 2022 4:22 PM > > To: Frank Li > > Cc: maz@kernel.org; tglx@linutronix.de; krzysztof.kozlowski+dt@linaro.org; > > shawnguo@kernel.org; s.hauer@pengutronix.de; kw@linux.com; > > bhelgaas@google.com; linux-kernel@vger.kernel.org; > > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > > pci@vger.kernel.org; Peng Fan ; Aisheng Dong > > ; jdmason@kudzu.us; kernel@pengutronix.de; > > festevam@gmail.com; dl-linux-imx ; kishon@ti.com; > > lorenzo.pieralisi@arm.com; ntb@lists.linux.dev; lznuaa@gmail.com > > Subject: [EXT] Re: [PATCH v7 3/4] dt-bindings: irqchip: imx mu work as msi > > controller > > > > Caution: EXT Email > > > > On Mon, Aug 22, 2022 at 10:51:29AM -0500, Frank Li wrote: > > > I.MX mu support generate irq by write a register. Provide msi controller > > > support so other driver such as PCI EP can use it by standard msi > > > interface as doorbell. > > > > > > Signed-off-by: Frank Li > > > --- > > > .../interrupt-controller/fsl,mu-msi.yaml | 98 +++++++++++++++++++ > > > 1 file changed, 98 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/interrupt- > > controller/fsl,mu-msi.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,mu- > > msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu- > > msi.yaml > > > new file mode 100644 > > > index 0000000000000..ac07b138e24c0 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu- > > msi.yaml > > > @@ -0,0 +1,98 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicet > > ree.org%2Fschemas%2Finterrupt-controller%2Ffsl%2Cmu- > > msi.yaml%23&data=05%7C01%7CFrank.Li%40nxp.com%7Cbff8f186128d > > 44209f4108da86dfc975%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 > > %7C637970592959950791%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLj > > AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C% > > 7C%7C&sdata=DHCOhmaJAhwb8Gl%2FEbPj32B6lR2zcIvyMY%2BTuPACb > > zI%3D&reserved=0 > > > +$schema: > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicet > > ree.org%2Fmeta- > > schemas%2Fcore.yaml%23&data=05%7C01%7CFrank.Li%40nxp.com%7 > > Cbff8f186128d44209f4108da86dfc975%7C686ea1d3bc2b4c6fa92cd99c5c3016 > > 35%7C0%7C0%7C637970592959950791%7CUnknown%7CTWFpbGZsb3d8eyJ > > WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D% > > 7C3000%7C%7C%7C&sdata=J4znEXyHnMyQOssSUsoxE2Mlhe2qCDC%2F > > 9WN6SKv69aM%3D&reserved=0 > > > + > > > +title: Freescale/NXP i.MX Messaging Unit (MU) work as msi controller > > > + > > > +maintainers: > > > + - Frank Li > > > + > > > +description: | > > > + The Messaging Unit module enables two processors within the SoC to > > > + communicate and coordinate by passing messages (e.g. data, status > > > + and control) through the MU interface. The MU also provides the ability > > > + for one processor (A side) to signal the other processor (B side) using > > > + interrupts. > > > + > > > + Because the MU manages the messaging between processors, the MU > > uses > > > + different clocks (from each side of the different peripheral buses). > > > + Therefore, the MU must synchronize the accesses from one side to the > > > + other. The MU accomplishes synchronization using two sets of matching > > > + registers (Processor A-facing, Processor B-facing). > > > + > > > + MU can work as msi interrupt controller to do doorbell > > > + > > > +allOf: > > > + - $ref: /schemas/interrupt-controller/msi-controller.yaml# > > > + > > > +properties: > > > + compatible: > > > + enum: > > > + - fsl,imx6sx-mu-msi > > > + - fsl,imx7ulp-mu-msi > > > + - fsl,imx8ulp-mu-msi > > > + - fsl,imx8ulp-mu-msi-s4 > > > + > > > + reg: > > > + items: > > > + - description: a side register base address > > > + - description: b side register base address > > > + > > > + reg-names: > > > + items: > > > + - const: processor a-facing > > > + - const: processor b-facing > > > > Isn't 'a' and 'b' sufficient to distinguish? Personally, doesn't really > > look like a case that benefits from -names at all. > > > > In any case, -names shouldn't have spaces. > > I like "a" and "b". > > But Marc Zyngier suggested use above name. > https://www.spinics.net/lists/linux-pci/msg128783.html > > @Marc Zyngier And I stand by my initial request. "a" doesn't convey any sort of useful information. Why not "I" and "II", while we're at it? Or something even funkier? M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel