From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93200C433F5 for ; Wed, 16 Mar 2022 09:28:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ISfZte2sq7ho5k/I6TickX9FA5hZq1SXLZQSrLJIVgQ=; b=uPKYZngONgoszk JBOAaWvAQZob/Bs7XGhgEd1HgnOGe3UNDLkyaNKs3n7m/wjga0R29AqCwAV4m0a2Z+oovX85dvcz8 r0eQjNxc3Ex+1LF2Y3I93EhYm5pp7LukK9TsAWke3h10J1tdcIKPlOmgNIZHTcdKY9qchHNh3PL0q nq6cJQ0WjlkCHH0kN3VOcyPzbS27cWmPDh5bXZssR+IpFzBeeaOyBrArol6kwesBsl8P2NeOX3a4y oDdPYQ80PtM1dCbIgSsOl/ERqsYh/i1XossP2fG888bNOrTTRrqT7j+o3myfVf+gYN4Euk/ZlGYzp 0ZJgJ8u1KCHEdRPh9oZQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUPwG-00CIvp-FH; Wed, 16 Mar 2022 09:27:28 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUPwD-00CIvW-JV for linux-arm-kernel@lists.infradead.org; Wed, 16 Mar 2022 09:27:27 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7299861554; Wed, 16 Mar 2022 09:27:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D7182C340E9; Wed, 16 Mar 2022 09:27:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1647422843; bh=MKTBVvZC36ySOk7uu1pI9+HCSVtzY329jPCiKPZeyp0=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=pCTi/H+G27JYycabXQk/rSsJajMBy1o7ZdBsCM/SA702IMKk9HYL6dxYlHtotnIcw 6AN7PyDHR0EKY1vxBiOGw/V3ZkIwxgm19GKCbAV/vx6KOdCB1lt7IoMlXZW9cJDFvy updRqn0Pembh4FnMIBjVTalhu1Gf+B/ySHwyh4yItzHoxd2tMMMiUtaKqbjlsjaKh9 M1LWp5McMvJRfLOCb26c16GgTZdCJswB9ZzzzlhazuUxaqhQwEjxLNaXx5cNdOzMk9 sjZcnBMH+EasPadLYtWsoahF71xFVPilJDstJ+f0y3SmQG0ruxgayh0UxXrrmbCuCh qn7Fck0I+M3OA== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nUPw9-00EsLm-D2; Wed, 16 Mar 2022 09:27:21 +0000 Date: Wed, 16 Mar 2022 09:27:21 +0000 Message-ID: <87ee32z1qe.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, kernel-team@android.com, Andre Przywara Subject: Re: [PATCH 4/4] KVM: arm64: vgic-v3: Advertise GICR_CTLR.{IR, CES} as a new GICD_IIDR revision In-Reply-To: References: <20220314164044.772709-1-maz@kernel.org> <20220314164044.772709-5-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oupton@google.com, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, kernel-team@android.com, andre.przywara@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220316_022725_765232_4BDCB6A4 X-CRM114-Status: GOOD ( 34.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 15 Mar 2022 23:13:09 +0000, Oliver Upton wrote: > > Hi Marc, > > On Mon, Mar 14, 2022 at 04:40:44PM +0000, Marc Zyngier wrote: > > Since adversising GICR_CTLR.{IC,CES} is directly observable from > > a guest, we need to make it selectable from userspace. > > > > For that, bump the default GICD_IIDR revision and let userspace > > downgrade it to the previous default. For GICv2, the two distributor > > revisions are strictly equivalent. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/vgic/vgic-init.c | 7 ++++++- > > arch/arm64/kvm/vgic/vgic-mmio-v2.c | 18 +++++++++++++++--- > > arch/arm64/kvm/vgic/vgic-mmio-v3.c | 23 +++++++++++++++++++++-- > > include/kvm/arm_vgic.h | 3 +++ > > 4 files changed, 45 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c > > index fc00304fe7d8..f84e04f334c6 100644 > > --- a/arch/arm64/kvm/vgic/vgic-init.c > > +++ b/arch/arm64/kvm/vgic/vgic-init.c > > @@ -319,7 +319,12 @@ int vgic_init(struct kvm *kvm) > > > > vgic_debug_init(kvm); > > > > - dist->implementation_rev = 2; > > + /* > > + * If userspace didn't set the GIC implementation revision, > > + * default to the latest and greatest. You know want it. > > + */ > > + if (!dist->implementation_rev) > > + dist->implementation_rev = KVM_VGIC_IMP_REV_LATEST; > > dist->initialized = true; > > > > out: > > diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v2.c b/arch/arm64/kvm/vgic/vgic-mmio-v2.c > > index 12e4c223e6b8..f2246c4ca812 100644 > > --- a/arch/arm64/kvm/vgic/vgic-mmio-v2.c > > +++ b/arch/arm64/kvm/vgic/vgic-mmio-v2.c > > @@ -73,9 +73,13 @@ static int vgic_mmio_uaccess_write_v2_misc(struct kvm_vcpu *vcpu, > > gpa_t addr, unsigned int len, > > unsigned long val) > > { > > + struct vgic_dist *dist = &vcpu->kvm->arch.vgic; > > + u32 reg; > > + > > switch (addr & 0x0c) { > > case GIC_DIST_IIDR: > > - if (val != vgic_mmio_read_v2_misc(vcpu, addr, len)) > > + reg = vgic_mmio_read_v2_misc(vcpu, addr, len); > > + if ((reg ^ val) & ~GICD_IIDR_REVISION_MASK) > > return -EINVAL; > > > > /* > > @@ -87,8 +91,16 @@ static int vgic_mmio_uaccess_write_v2_misc(struct kvm_vcpu *vcpu, > > * migration from old kernels to new kernels with legacy > > * userspace. > > */ > > - vcpu->kvm->arch.vgic.v2_groups_user_writable = true; > > - return 0; > > + reg = FIELD_GET(GICD_IIDR_REVISION_MASK, reg); > > + switch (reg) { > > + case KVM_VGIC_IMP_REV_2: > > + case KVM_VGIC_IMP_REV_3: > > + dist->v2_groups_user_writable = true; > > Could you eliminate this bool and just pivot off of the implementation > version? Good point. Having a non-zero implementation will serve the same purpose. The drawback is that we lose the documentation aspect of the field, but we can probably work around that. > > > + dist->implementation_rev = reg; > > + return 0; > > + default: > > + return -EINVAL; > > + } > > } > > > > vgic_mmio_write_v2_misc(vcpu, addr, len, val); > > diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c > > index a6be403996c6..4c8e4f83e3d1 100644 > > --- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c > > +++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c > > @@ -155,13 +155,27 @@ static int vgic_mmio_uaccess_write_v3_misc(struct kvm_vcpu *vcpu, > > unsigned long val) > > { > > struct vgic_dist *dist = &vcpu->kvm->arch.vgic; > > + u32 reg; > > > > switch (addr & 0x0c) { > > case GICD_TYPER2: > > - case GICD_IIDR: > > if (val != vgic_mmio_read_v3_misc(vcpu, addr, len)) > > return -EINVAL; > > return 0; > > + case GICD_IIDR: > > + reg = vgic_mmio_read_v3_misc(vcpu, addr, len); > > + if ((reg ^ val) & ~GICD_IIDR_REVISION_MASK) > > + return -EINVAL; > > + > > + reg = FIELD_GET(GICD_IIDR_REVISION_MASK, reg); > > + switch (reg) { > > + case KVM_VGIC_IMP_REV_2: > > + case KVM_VGIC_IMP_REV_3: > > + dist->implementation_rev = reg; > > + return 0; > > + default: > > + return -EINVAL; > > + } > > case GICD_CTLR: > > /* Not a GICv4.1? No HW SGIs */ > > if (!kvm_vgic_global_state.has_gicv4_1) > > @@ -232,8 +246,13 @@ static unsigned long vgic_mmio_read_v3r_ctlr(struct kvm_vcpu *vcpu, > > gpa_t addr, unsigned int len) > > { > > struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; > > + unsigned long val; > > + > > + val = atomic_read(&vgic_cpu->ctlr); > > + if (vcpu->kvm->arch.vgic.implementation_rev >= KVM_VGIC_IMP_REV_3) > > That's a lot of indirection :) Could you make a helper for getting at > the implementation revision from a vCPU pointer? Sure, as there will be two users now. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel