From: Marc Zyngier <maz@kernel.org>
To: Fuad Tabba <tabba@google.com>
Cc: kvmarm@lists.cs.columbia.edu, will@kernel.org,
james.morse@arm.com, alexandru.elisei@arm.com,
suzuki.poulose@arm.com, mark.rutland@arm.com,
christoffer.dall@arm.com, pbonzini@redhat.com,
drjones@redhat.com, oupton@google.com, qperret@google.com,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
kernel-team@android.com
Subject: Re: [PATCH v4 03/15] KVM: arm64: MDCR_EL2 is a 64-bit register
Date: Wed, 18 Aug 2021 15:32:24 +0100 [thread overview]
Message-ID: <87k0kisu13.wl-maz@kernel.org> (raw)
In-Reply-To: <20210817081134.2918285-4-tabba@google.com>
On Tue, 17 Aug 2021 09:11:22 +0100,
Fuad Tabba <tabba@google.com> wrote:
>
> Fix the places in KVM that treat MDCR_EL2 as a 32-bit register.
> More recent features (e.g., FEAT_SPEv1p2) use bits above 31.
>
> No functional change intended.
>
> Acked-by: Will Deacon <will@kernel.org>
> Signed-off-by: Fuad Tabba <tabba@google.com>
> ---
> arch/arm64/include/asm/kvm_arm.h | 20 ++++++++++----------
> arch/arm64/include/asm/kvm_asm.h | 2 +-
> arch/arm64/include/asm/kvm_host.h | 2 +-
> arch/arm64/kvm/debug.c | 2 +-
> arch/arm64/kvm/hyp/nvhe/debug-sr.c | 2 +-
> arch/arm64/kvm/hyp/vhe/debug-sr.c | 2 +-
> 6 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
> index d436831dd706..6a523ec83415 100644
> --- a/arch/arm64/include/asm/kvm_arm.h
> +++ b/arch/arm64/include/asm/kvm_arm.h
> @@ -281,18 +281,18 @@
> /* Hyp Debug Configuration Register bits */
> #define MDCR_EL2_E2TB_MASK (UL(0x3))
> #define MDCR_EL2_E2TB_SHIFT (UL(24))
> -#define MDCR_EL2_TTRF (1 << 19)
> -#define MDCR_EL2_TPMS (1 << 14)
> +#define MDCR_EL2_TTRF (UL(1) << 19)
> +#define MDCR_EL2_TPMS (UL(1) << 14)
> #define MDCR_EL2_E2PB_MASK (UL(0x3))
> #define MDCR_EL2_E2PB_SHIFT (UL(12))
> -#define MDCR_EL2_TDRA (1 << 11)
> -#define MDCR_EL2_TDOSA (1 << 10)
> -#define MDCR_EL2_TDA (1 << 9)
> -#define MDCR_EL2_TDE (1 << 8)
> -#define MDCR_EL2_HPME (1 << 7)
> -#define MDCR_EL2_TPM (1 << 6)
> -#define MDCR_EL2_TPMCR (1 << 5)
> -#define MDCR_EL2_HPMN_MASK (0x1F)
> +#define MDCR_EL2_TDRA (UL(1) << 11)
> +#define MDCR_EL2_TDOSA (UL(1) << 10)
> +#define MDCR_EL2_TDA (UL(1) << 9)
> +#define MDCR_EL2_TDE (UL(1) << 8)
> +#define MDCR_EL2_HPME (UL(1) << 7)
> +#define MDCR_EL2_TPM (UL(1) << 6)
> +#define MDCR_EL2_TPMCR (UL(1) << 5)
> +#define MDCR_EL2_HPMN_MASK (UL(0x1F))
>
> /* For compatibility with fault code shared with 32-bit */
> #define FSC_FAULT ESR_ELx_FSC_FAULT
> diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
> index 9f0bf2109be7..63ead9060ab5 100644
> --- a/arch/arm64/include/asm/kvm_asm.h
> +++ b/arch/arm64/include/asm/kvm_asm.h
> @@ -210,7 +210,7 @@ extern u64 __vgic_v3_read_vmcr(void);
> extern void __vgic_v3_write_vmcr(u32 vmcr);
> extern void __vgic_v3_init_lrs(void);
>
> -extern u32 __kvm_get_mdcr_el2(void);
> +extern u64 __kvm_get_mdcr_el2(void);
>
> #define __KVM_EXTABLE(from, to) \
> " .pushsection __kvm_ex_table, \"a\"\n" \
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index 347781f99b6a..4d2d974c1522 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -289,7 +289,7 @@ struct kvm_vcpu_arch {
>
> /* HYP configuration */
> u64 hcr_el2;
> - u32 mdcr_el2;
> + u64 mdcr_el2;
This breaks an existing trace in debug.c::kvm_arm_setup_mdcr_el2():
trace_kvm_arm_set_dreg32("MDCR_EL2", vcpu->arch.mdcr_el2);
which expects a 32bit value. I guess we could add an equivalent 64bit
version, or silently upgrade the tracepoint to take a 64bit value.
None of them are good solutions, but hey, something has to give...
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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next prev parent reply other threads:[~2021-08-18 14:34 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-17 8:11 [PATCH v4 00/15] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 01/15] KVM: arm64: placeholder to check if VM is protected Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 02/15] KVM: arm64: Remove trailing whitespace in comment Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 03/15] KVM: arm64: MDCR_EL2 is a 64-bit register Fuad Tabba
2021-08-18 14:32 ` Marc Zyngier [this message]
2021-08-17 8:11 ` [PATCH v4 04/15] KVM: arm64: Fix names of config register fields Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 05/15] KVM: arm64: Refactor sys_regs.h,c for nVHE reuse Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 06/15] KVM: arm64: Restore mdcr_el2 from vcpu Fuad Tabba
2021-08-18 13:13 ` Will Deacon
2021-08-18 14:42 ` Marc Zyngier
2021-08-17 8:11 ` [PATCH v4 07/15] KVM: arm64: Keep mdcr_el2's value as set by __init_el2_debug Fuad Tabba
2021-08-18 13:17 ` Will Deacon
2021-08-17 8:11 ` [PATCH v4 08/15] KVM: arm64: Track value of cptr_el2 in struct kvm_vcpu_arch Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 09/15] KVM: arm64: Add feature register flag definitions Fuad Tabba
2021-08-18 13:21 ` Will Deacon
2021-08-17 8:11 ` [PATCH v4 10/15] KVM: arm64: Add config register bit definitions Fuad Tabba
2021-08-18 15:16 ` Marc Zyngier
2021-08-17 8:11 ` [PATCH v4 11/15] KVM: arm64: Guest exit handlers for nVHE hyp Fuad Tabba
2021-08-18 16:45 ` Marc Zyngier
2021-08-19 14:35 ` Marc Zyngier
2021-08-23 10:21 ` Fuad Tabba
2021-08-23 12:10 ` Marc Zyngier
2021-08-17 8:11 ` [PATCH v4 12/15] KVM: arm64: Add trap handlers for protected VMs Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 13/15] KVM: arm64: Move sanitized copies of CPU features Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 14/15] KVM: arm64: Trap access to pVM restricted features Fuad Tabba
2021-08-17 8:11 ` [PATCH v4 15/15] KVM: arm64: Handle protected guests at 32 bits Fuad Tabba
2021-08-19 8:10 ` Oliver Upton
2021-08-23 10:25 ` Fuad Tabba
2021-08-20 10:34 ` [PATCH v4 00/15] KVM: arm64: Fixed features for protected VMs Marc Zyngier
2021-08-23 10:23 ` Fuad Tabba
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