From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59483C04FF3 for ; Mon, 24 May 2021 18:50:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2716061413 for ; Mon, 24 May 2021 18:50:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2716061413 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nEPL8bguj3VaYOAZwsiNVF8qfupWQQSKe8ZoNyeSNsk=; b=SRH4Fb4KJ94S9U Ow3SgBBmzIIfDVAU7/zARdlOUeLdNRTbmhpY6M9kRCPWiJuoq4HZP0G1yPLapIx9rBuuKTvnD6kEu D5kCcmlMzzGh9ZB1DBbBwJMiMcC1gEM1qrk1T3mIopVGcl/+6C4tm+eB0fZ/vOpRRB42gLfWdM6Tj ApnpnphJv2XwtSZHECgWxqxiw3Tan3IJxLUNE+z9IhF+ly7kvFk1RVOUws2AbVgBYylQ7OL/VlU8t jPUNWI0ov0DupH51VA5qnhIt21vwV2E9RYh+KL2p74Qn5miTf6XhuVuNoZsMjWddrtksBA2Up/6uM ybnxM7UTV62xoPR6VYfw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1llFcc-001XAg-Lu; Mon, 24 May 2021 18:48:16 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1ll9nr-000us5-9f for linux-arm-kernel@lists.infradead.org; Mon, 24 May 2021 12:35:29 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C6A7761209; Mon, 24 May 2021 12:35:26 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ll9no-003D9X-Ot; Mon, 24 May 2021 13:35:24 +0100 Date: Mon, 24 May 2021 13:35:24 +0100 Message-ID: <87mtskwbqr.wl-maz@kernel.org> From: Marc Zyngier To: Zenghui Yu Cc: , , , , Andre Przywara , , , , James Morse , Suzuki K Poulose , "Alexandru\ Elisei" , Subject: Re: [PATCH v4 09/66] KVM: arm64: nv: Support virtual EL2 exceptions In-Reply-To: References: <20210510165920.1913477-1-maz@kernel.org> <20210510165920.1913477-10-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: yuzenghui@huawei.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, kernel-team@android.com, andre.przywara@arm.com, christoffer.dall@arm.com, jintack@cs.columbia.edu, haibo.xu@linaro.org, james.morse@arm.com, suzuki.poulose@arm.com, alexandru.elisei@arm.com, jintack.lim@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210524_053527_397561_D93E7FA9 X-CRM114-Status: GOOD ( 27.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 20 May 2021 13:55:48 +0100, Zenghui Yu wrote: > > On 2021/5/11 0:58, Marc Zyngier wrote: > > From: Jintack Lim > > > > Support injecting exceptions and performing exception returns to and > > from virtual EL2. This must be done entirely in software except when > > taking an exception from vEL0 to vEL2 when the virtual HCR_EL2.{E2H,TGE} > > == {1,1} (a VHE guest hypervisor). > > > > Signed-off-by: Jintack Lim > > Signed-off-by: Christoffer Dall > > [maz: switch to common exception injection framework] > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/kvm_arm.h | 17 +++ > > arch/arm64/include/asm/kvm_emulate.h | 10 ++ > > arch/arm64/kvm/Makefile | 2 +- > > arch/arm64/kvm/emulate-nested.c | 176 +++++++++++++++++++++++++++ > > arch/arm64/kvm/hyp/exception.c | 45 +++++-- > > arch/arm64/kvm/inject_fault.c | 63 ++++++++-- > > arch/arm64/kvm/trace_arm.h | 59 +++++++++ > > 7 files changed, 354 insertions(+), 18 deletions(-) > > create mode 100644 arch/arm64/kvm/emulate-nested.c > > [...] > > > static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr) > > { > > unsigned long cpsr = *vcpu_cpsr(vcpu); > > bool is_aarch32 = vcpu_mode_is_32bit(vcpu); > > u32 esr = 0; > > - vcpu->arch.flags |= (KVM_ARM64_EXCEPT_AA64_EL1 | > > - KVM_ARM64_EXCEPT_AA64_ELx_SYNC | > > - KVM_ARM64_PENDING_EXCEPTION); > > - > > - vcpu_write_sys_reg(vcpu, addr, FAR_EL1); > > + pend_sync_exception(vcpu); > > /* > > * Build an {i,d}abort, depending on the level and the > > @@ -45,16 +79,22 @@ static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr > > if (!is_iabt) > > esr |= ESR_ELx_EC_DABT_LOW << ESR_ELx_EC_SHIFT; > > - vcpu_write_sys_reg(vcpu, esr | ESR_ELx_FSC_EXTABT, ESR_EL1); > > + esr |= ESR_ELx_FSC_EXTABT; > > + > > + if (vcpu->arch.flags & KVM_ARM64_EXCEPT_AA64_EL1) { > > This isn't the right way to pick between EL1 and EL2 since > KVM_ARM64_EXCEPT_AA64_EL1 is (0 << 11), we will not be able > to inject abort to EL1 that way. Indeed, well observed. I'm squashing the following fix in this patch. Thanks, M. diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 27397ecf9a23..fe781557e42c 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -524,6 +524,7 @@ struct kvm_vcpu_arch { #define KVM_ARM64_EXCEPT_AA64_ELx_SERR (3 << 9) #define KVM_ARM64_EXCEPT_AA64_EL1 (0 << 11) #define KVM_ARM64_EXCEPT_AA64_EL2 (1 << 11) +#define KVM_ARM64_EXCEPT_AA64_EL_MASK (1 << 11) /* * Overlaps with KVM_ARM64_EXCEPT_MASK on purpose so that it can't be diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c index 06df0bb848ca..5dcf3f8b08b8 100644 --- a/arch/arm64/kvm/inject_fault.c +++ b/arch/arm64/kvm/inject_fault.c @@ -52,6 +52,11 @@ static void pend_sync_exception(struct kvm_vcpu *vcpu) } } +static bool match_target_el(struct kvm_vcpu *vcpu, unsigned long target) +{ + return (vcpu->arch.flags & KVM_ARM64_EXCEPT_AA64_EL_MASK) == target; +} + static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr) { unsigned long cpsr = *vcpu_cpsr(vcpu); @@ -81,7 +86,7 @@ static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr esr |= ESR_ELx_FSC_EXTABT; - if (vcpu->arch.flags & KVM_ARM64_EXCEPT_AA64_EL1) { + if (match_target_el(vcpu, KVM_ARM64_EXCEPT_AA64_EL1)) { vcpu_write_sys_reg(vcpu, addr, FAR_EL1); vcpu_write_sys_reg(vcpu, esr, ESR_EL1); } else { @@ -103,7 +108,7 @@ static void inject_undef64(struct kvm_vcpu *vcpu) if (kvm_vcpu_trap_il_is32bit(vcpu)) esr |= ESR_ELx_IL; - if (vcpu->arch.flags & KVM_ARM64_EXCEPT_AA64_EL1) + if (match_target_el(vcpu, KVM_ARM64_EXCEPT_AA64_EL1)) vcpu_write_sys_reg(vcpu, esr, ESR_EL1); else vcpu_write_sys_reg(vcpu, esr, ESR_EL2); -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel