From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E82B9C388F9 for ; Wed, 11 Nov 2020 23:12:22 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6C34720797 for ; Wed, 11 Nov 2020 23:12:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="IvFk+0Xb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6C34720797 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=56hdYXomdwf09eGgUejamH8Ov2/33wuXh4AJoz5dVJk=; b=IvFk+0XbmKFT9UnS9+m39pjQJ WWPT17yz9JSTqJid41gRU2BoPC3GVtpz/KUi4ZL+qAuOgViBOHXIlk3LwZ79Xi5mpKMEq5JfactAJ 0AbQuxjtZQGtVoHz0GIUx/rNX2gZ7zTs6ES1I85sPBMyDqkNINrehcvPGHnvdjdIgQ4IUInLnwZhr OvjRsiHsSTiK0O0qeOsDm+z7IfbDWR2BbgiKxN8dRIES87nDGCfUE6zMELk03v8hK/ee22gEfwk7j ItqfmNtcbkbplc/SYXgf6bCTSO0P7RV2vD54UIbGD04kGuJtGlvoSPco5EXgyqPzFocnXN3HdDJa3 5qIvD17Xg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kczHK-0003Y4-KE; Wed, 11 Nov 2020 23:11:50 +0000 Received: from mga11.intel.com ([192.55.52.93]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kczHG-0003Wl-OS for linux-arm-kernel@lists.infradead.org; Wed, 11 Nov 2020 23:11:47 +0000 IronPort-SDR: M6+z33hOkiv97IAaKp4EHYchrhf7b8wjYSveW4GuH9uU+LZxrfErq9ilg8yHkshsywnSZPBVH3 W+KErla0MnCA== X-IronPort-AV: E=McAfee;i="6000,8403,9802"; a="166724200" X-IronPort-AV: E=Sophos;i="5.77,470,1596524400"; d="scan'208";a="166724200" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2020 15:11:44 -0800 IronPort-SDR: 2SigUd3RC6BHd0NrZjhiVcNkd4/T5ldcTrknfGqqjnYMA+dH0hh6VxbwKoY75rW1jfqAHhP1bp TkxPMdnvvBtw== X-IronPort-AV: E=Sophos;i="5.77,470,1596524400"; d="scan'208";a="541993746" Received: from lmwang8-mobl.ccr.corp.intel.com (HELO [10.254.209.85]) ([10.254.209.85]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2020 15:11:39 -0800 Subject: Re: [PATCH v7 04/24] iommu: Add a page fault handler To: Jean-Philippe Brucker References: <20200519175502.2504091-1-jean-philippe@linaro.org> <20200519175502.2504091-5-jean-philippe@linaro.org> <20201111135740.GA2622074@myrica> From: Lu Baolu Message-ID: <8e630294-8199-68e3-d55a-68e6484d953a@linux.intel.com> Date: Thu, 12 Nov 2020 07:11:37 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.4.2 MIME-Version: 1.0 In-Reply-To: <20201111135740.GA2622074@myrica> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201111_181147_071638_7E993F3C X-CRM114-Status: GOOD ( 23.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, jgg@ziepe.ca, linux-pci@vger.kernel.org, joro@8bytes.org, Jonathan.Cameron@huawei.com, robin.murphy@arm.com, fenghua.yu@intel.com, hch@infradead.org, linux-mm@kvack.org, iommu@lists.linux-foundation.org, zhangfei.gao@linaro.org, catalin.marinas@arm.com, felix.kuehling@amd.com, xuzaibo@huawei.com, will@kernel.org, christian.koenig@amd.com, linux-arm-kernel@lists.infradead.org, baolu.lu@linux.intel.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Jean, On 2020/11/11 21:57, Jean-Philippe Brucker wrote: > Hi Baolu, > > Thanks for the review. I'm only now reworking this and realized I've never > sent a reply, sorry about that. > > On Wed, May 20, 2020 at 02:42:21PM +0800, Lu Baolu wrote: >> Hi Jean, >> >> On 2020/5/20 1:54, Jean-Philippe Brucker wrote: >>> Some systems allow devices to handle I/O Page Faults in the core mm. For >>> example systems implementing the PCIe PRI extension or Arm SMMU stall >>> model. Infrastructure for reporting these recoverable page faults was >>> added to the IOMMU core by commit 0c830e6b3282 ("iommu: Introduce device >>> fault report API"). Add a page fault handler for host SVA. >>> >>> IOMMU driver can now instantiate several fault workqueues and link them >>> to IOPF-capable devices. Drivers can choose between a single global >>> workqueue, one per IOMMU device, one per low-level fault queue, one per >>> domain, etc. >>> >>> When it receives a fault event, supposedly in an IRQ handler, the IOMMU >>> driver reports the fault using iommu_report_device_fault(), which calls >>> the registered handler. The page fault handler then calls the mm fault >>> handler, and reports either success or failure with iommu_page_response(). >>> When the handler succeeded, the IOMMU retries the access. >>> >>> The iopf_param pointer could be embedded into iommu_fault_param. But >>> putting iopf_param into the iommu_param structure allows us not to care >>> about ordering between calls to iopf_queue_add_device() and >>> iommu_register_device_fault_handler(). >>> >>> Signed-off-by: Jean-Philippe Brucker > [...] >>> +static enum iommu_page_response_code >>> +iopf_handle_single(struct iopf_fault *iopf) >>> +{ >>> + vm_fault_t ret; >>> + struct mm_struct *mm; >>> + struct vm_area_struct *vma; >>> + unsigned int access_flags = 0; >>> + unsigned int fault_flags = FAULT_FLAG_REMOTE; >>> + struct iommu_fault_page_request *prm = &iopf->fault.prm; >>> + enum iommu_page_response_code status = IOMMU_PAGE_RESP_INVALID; >>> + >>> + if (!(prm->flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID)) >>> + return status; >>> + >>> + mm = iommu_sva_find(prm->pasid); >>> + if (IS_ERR_OR_NULL(mm)) >>> + return status; >>> + >>> + down_read(&mm->mmap_sem); >>> + >>> + vma = find_extend_vma(mm, prm->addr); >>> + if (!vma) >>> + /* Unmapped area */ >>> + goto out_put_mm; >>> + >>> + if (prm->perm & IOMMU_FAULT_PERM_READ) >>> + access_flags |= VM_READ; >>> + >>> + if (prm->perm & IOMMU_FAULT_PERM_WRITE) { >>> + access_flags |= VM_WRITE; >>> + fault_flags |= FAULT_FLAG_WRITE; >>> + } >>> + >>> + if (prm->perm & IOMMU_FAULT_PERM_EXEC) { >>> + access_flags |= VM_EXEC; >>> + fault_flags |= FAULT_FLAG_INSTRUCTION; >>> + } >>> + >>> + if (!(prm->perm & IOMMU_FAULT_PERM_PRIV)) >>> + fault_flags |= FAULT_FLAG_USER; >>> + >>> + if (access_flags & ~vma->vm_flags) >>> + /* Access fault */ >>> + goto out_put_mm; >>> + >>> + ret = handle_mm_fault(vma, prm->addr, fault_flags); >>> + status = ret & VM_FAULT_ERROR ? IOMMU_PAGE_RESP_INVALID : >> >> Do you mind telling why it's IOMMU_PAGE_RESP_INVALID but not >> IOMMU_PAGE_RESP_FAILURE? > > PAGE_RESP_FAILURE maps to PRI Response code "Response Failure" which > indicates a catastrophic error and causes the function to disable PRI. > Instead PAGE_RESP_INVALID maps to PRI Response code "Invalid request", > which tells the function that the address is invalid and there is no point > retrying this particular access. Thanks for the explanation. I am also working on converting Intel VT-d to use this framework (and the sva helpers). So far so good. Best regards, baolu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel