From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B87FEC433EF for ; Mon, 29 Nov 2021 13:27:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5mX5xZo18e/uCs7sKWYR/sm8tlnJnUVM7QVqtg4W4TY=; b=DiI3b+5wDv8aFs vU1vNhNlEt7RkmHn47kRICOhldpcMOSdu8hwpyZyqX8Ww/h26gr6c4sdp8XF2ibUbpuwBHW7zOGK1 DPDjmYOWaaWx4F3w+DWzpuWW/1t/DAIfxv+SFvP9jCdrKAWJ0CwWe/z0h5Lkkj0PsyBNbrrgk78XX FO0pqDuXL+2UZ2++NtGiYKrQMCJlxHabra3M2pA2eQwKDDpwW+AdjnOTWXZj2dF3ZorPnG/RUo7o8 v2k8PS8zYmvoZoNnPHMB1kaVUHxS18HOVA8hN7BRSGHpRn01+rqQWO6z1iwTlb5itvQPv6h4TiP2X R+kIq1SAgm3nUVrFGMKg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mrgf2-000qWn-UG; Mon, 29 Nov 2021 13:25:37 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mrgex-000qW0-V5 for linux-arm-kernel@lists.infradead.org; Mon, 29 Nov 2021 13:25:34 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A9BD01042; Mon, 29 Nov 2021 05:25:30 -0800 (PST) Received: from [10.57.34.182] (unknown [10.57.34.182]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5C04B3F766; Mon, 29 Nov 2021 05:25:27 -0800 (PST) Message-ID: <98dfa822-218b-6ad9-4fd0-56a8e5d2bd02@arm.com> Date: Mon, 29 Nov 2021 13:25:27 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Thunderbird/91.3.2 Subject: Re: [patch 33/37] iommu/arm-smmu-v3: Use msi_get_virq() Content-Language: en-GB To: Thomas Gleixner , LKML , Will Deacon Cc: Nishanth Menon , Mark Rutland , Stuart Yoder , linux-pci@vger.kernel.org, Ashok Raj , Marc Zygnier , x86@kernel.org, Sinan Kaya , iommu@lists.linux-foundation.org, Bjorn Helgaas , Megha Dey , Jason Gunthorpe , Kevin Tian , Alex Williamson , Santosh Shilimkar , linux-arm-kernel@lists.infradead.org, Tero Kristo , Greg Kroah-Hartman , Vinod Koul , dmaengine@vger.kernel.org References: <20211126224100.303046749@linutronix.de> <20211126230525.885757679@linutronix.de> From: Robin Murphy In-Reply-To: <20211126230525.885757679@linutronix.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211129_052532_077934_2751CAA8 X-CRM114-Status: GOOD ( 16.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2021-11-27 01:22, Thomas Gleixner wrote: > Let the core code fiddle with the MSI descriptor retrieval. > > Signed-off-by: Thomas Gleixner > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 19 +++---------------- > 1 file changed, 3 insertions(+), 16 deletions(-) > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -3154,7 +3154,6 @@ static void arm_smmu_write_msi_msg(struc > > static void arm_smmu_setup_msis(struct arm_smmu_device *smmu) > { > - struct msi_desc *desc; > int ret, nvec = ARM_SMMU_MAX_MSIS; > struct device *dev = smmu->dev; > > @@ -3182,21 +3181,9 @@ static void arm_smmu_setup_msis(struct a > return; > } > > - for_each_msi_entry(desc, dev) { > - switch (desc->msi_index) { > - case EVTQ_MSI_INDEX: > - smmu->evtq.q.irq = desc->irq; > - break; > - case GERROR_MSI_INDEX: > - smmu->gerr_irq = desc->irq; > - break; > - case PRIQ_MSI_INDEX: > - smmu->priq.q.irq = desc->irq; > - break; > - default: /* Unknown */ > - continue; > - } > - } > + smmu->evtq.q.irq = msi_get_virq(dev, EVTQ_MSI_INDEX); > + smmu->gerr_irq = msi_get_virq(dev, GERROR_MSI_INDEX); > + smmu->priq.q.irq = msi_get_virq(dev, PRIQ_MSI_INDEX); FWIW I've just quickly booted the msi-v1-part-2 branch on a platform with MSIs but no PRI such that this now sets priq.q.irq to an error value, and as I predicted it's still happy. Tested-by: Robin Murphy Cheers, Robin. > /* Add callback to free MSIs on teardown */ > devm_add_action(dev, arm_smmu_free_msis, dev); > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel