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Wed, 20 Nov 2019 15:58:56 +0800 Received: from RTEXMB03.realtek.com.tw ([fe80::a4bf:5be3:6e60:69f9]) by RTEXMB03.realtek.com.tw ([fe80::a4bf:5be3:6e60:69f9%8]) with mapi id 15.01.1779.005; Wed, 20 Nov 2019 15:58:56 +0800 From: James Tai To: =?utf-8?B?QW5kcmVhcyBGw6RyYmVy?= Subject: RE: [PATCH] arm64: dts: realtek: Add Realtek rtd1619 and mjolnir Thread-Topic: [PATCH] arm64: dts: realtek: Add Realtek rtd1619 and mjolnir Thread-Index: AdWTrwRiu8TDC5guRneVMItRk6mPLwAihi8AAIJriSACDOAZgAA+WRqQ Date: Wed, 20 Nov 2019 07:58:56 +0000 Message-ID: <993d5da60a87443995347ee2a4c74959@realtek.com> References: <43B123F21A8CFE44A9641C099E4196FFCF91BEFA@RTITMBSVM04.realtek.com.tw> <25fdd8eb-f1a0-82ae-9c4b-22325b163b0e@suse.de> <43B123F21A8CFE44A9641C099E4196FFCF920024@RTITMBSVM04.realtek.com.tw> <6182b89f-cd7e-ce7c-56f7-e2f500321cde@suse.de> In-Reply-To: <6182b89f-cd7e-ce7c-56f7-e2f500321cde@suse.de> Accept-Language: zh-TW, en-US Content-Language: zh-TW X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.21.190.187] MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191119_235912_183045_BA86F74A X-CRM114-Status: GOOD ( 12.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , "'linux-kernel@vger.kernel.org'" , "linux-arm-kernel@lists.infradead.org" , "linux-realtek-soc@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Andreas, > > This conflicts with what I see in BSP irq mux code here: > https://github.com/BPI-SINOVOIP/BPI-M4-bsp/blob/master/linux-rtk/drivers/ir > qchip/irq-rtd16xx.h > > That does show UR0 as bit 2 for the iso irq mux, as for previous SoCs. > Is that code wrong, or does the same UART0 IP block have two alternative > interrupts for backwards compatibility? I therefore held back RTD1619 irq mux > patches from my irqchip v4 series [1]. > It is code wrong. The UR0 should remove from "irq-rtd16xx.h". > The BSP DT does assign non-mux interrupts to the UART node like you did: > https://github.com/BPI-SINOVOIP/BPI-M4-bsp/blob/master/linux-rtk/arch/arm > 64/boot/dts/realtek/rtd16xx/rtd-16xx.dtsi > And I obviously trust that you tested your DT to produce serial output. > > Also note how there are UR1_TO and UR2_TO (TO = timeout?) in addition to > regular UR1 and UR2 interrupts in the mux above, just as for RTD1295 and > RTD1195 (UR1/UR1_TO only). From my irqmux v4 series posted last night I had > to drop those additional interrupts property values from the DT [2], as they > violate mainline's DesignWare DT schema's maxItems 1 and would require a > new compatible string (and a driver patch to make use of it). > Yes, TO is interrupt timeout. Regards, James _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel