From: Alexandru Elisei <alexandru.elisei@arm.com>
To: "Alex Bennée" <alex.bennee@linaro.org>, "Marc Zyngier" <maz@kernel.org>
Cc: kvm@vger.kernel.org, shashi.mallela@linaro.org,
eric.auger@redhat.com, qemu-arm@nongnu.org,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, christoffer.dall@arm.com
Subject: Re: [kvm-unit-tests PATCH v1 1/4] arm64: split its-trigger test into KVM and TCG variants
Date: Wed, 28 Apr 2021 15:00:15 +0100 [thread overview]
Message-ID: <996210ae-9c63-54ff-1a65-6dbd63da74d2@arm.com> (raw)
In-Reply-To: <87fszasjdg.fsf@linaro.org>
Hi,
On 4/28/21 1:06 PM, Alex Bennée wrote:
> Marc Zyngier <maz@kernel.org> writes:
>
>> On 2021-04-28 11:18, Alex Bennée wrote:
>>> A few of the its-trigger tests rely on IMPDEF behaviour where caches
>>> aren't flushed before invall events. However TCG emulation doesn't
>>> model any invall behaviour and as we can't probe for it we need to be
>>> told. Split the test into a KVM and TCG variant and skip the invall
>>> tests when under TCG.
>>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>> Cc: Shashi Mallela <shashi.mallela@linaro.org>
>>> ---
>>> arm/gic.c | 60 +++++++++++++++++++++++++++--------------------
>>> arm/unittests.cfg | 11 ++++++++-
>>> 2 files changed, 45 insertions(+), 26 deletions(-)
>>> diff --git a/arm/gic.c b/arm/gic.c
>>> index 98135ef..96a329d 100644
>>> --- a/arm/gic.c
>>> +++ b/arm/gic.c
>>> @@ -36,6 +36,7 @@ static struct gic *gic;
>>> static int acked[NR_CPUS], spurious[NR_CPUS];
>>> static int irq_sender[NR_CPUS], irq_number[NR_CPUS];
>>> static cpumask_t ready;
>>> +static bool under_tcg;
>>> static void nr_cpu_check(int nr)
>>> {
>>> @@ -734,32 +735,38 @@ static void test_its_trigger(void)
>>> /*
>>> * re-enable the LPI but willingly do not call invall
>>> * so the change in config is not taken into account.
>>> - * The LPI should not hit
>>> + * The LPI should not hit. This does however depend on
>>> + * implementation defined behaviour - under QEMU TCG emulation
>>> + * it can quite correctly process the event directly.
>> It looks to me that you are using an IMPDEF behaviour of *TCG*
>> here. The programming model mandates that there is an invalidation
>> if you change the configuration of the LPI.
> But does it mandate that the LPI cannot be sent until the invalidation?
I think Marc is referring to this section of the GIC architecture (Arm IHI 0069F,
page 5-82, I've highlighted the interesting bits):
"A Redistributor can cache the information from the LPI Configuration tables
pointed to by GICR_PROPBASER, when GICR_CTLR.EnableLPI == 1, subject to all of the
following rules:
* Whether or not one or more caches are present is IMPLEMENTATION DEFINED. Where
at least one cache is present, the structure and size is IMPLEMENTATION DEFINED.
* An LPI Configuration table entry might be allocated into the cache at any time.
* A cached LPI Configuration table entry is not guaranteed to remain in the cache.
* A cached LPI Configuration table entry *is not guaranteed to remain incoherent
with memory*.
* A change to the LPI configuration *is not guaranteed to be visible until an
appropriate invalidation operation has completed*"
I interpret that as that an INVALL guarantees that a change is visible, but it the
change can become visible even without the INVALL.
The test relies on the fact that changes to the LPI tables are not visible *under
KVM* until the INVALL command, but that's not necessarily the case on real
hardware. To match the spec, I think the test "dev2/eventid=20 still does not
trigger any LPI" should be removed and the stats reset should take place before
the configuration for LPI 8195 is set to the default.
Thanks,
Alex
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-28 14:02 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-28 10:18 [kvm-unit-tests PATCH v1 0/4] enable LPI and ITS for TCG Alex Bennée
2021-04-28 10:18 ` [kvm-unit-tests PATCH v1 1/4] arm64: split its-trigger test into KVM and TCG variants Alex Bennée
2021-04-28 10:29 ` Marc Zyngier
2021-04-28 12:06 ` Alex Bennée
2021-04-28 14:00 ` Alexandru Elisei [this message]
2021-04-28 14:36 ` Marc Zyngier
2021-04-28 15:26 ` Auger Eric
2021-04-28 15:37 ` Alex Bennée
2021-04-28 16:31 ` Alex Bennée
2021-04-28 16:46 ` Marc Zyngier
2021-04-28 10:18 ` [kvm-unit-tests PATCH v1 2/4] scripts/arch-run: don't use deprecated server/nowait options Alex Bennée
2021-04-28 10:18 ` [kvm-unit-tests PATCH v1 3/4] arm64: enable its-migration tests for TCG Alex Bennée
2021-04-28 10:18 ` [kvm-unit-tests PATCH v1 4/4] arm64: split its-migrate-unmapped-collection into KVM and TCG variants Alex Bennée
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=996210ae-9c63-54ff-1a65-6dbd63da74d2@arm.com \
--to=alexandru.elisei@arm.com \
--cc=alex.bennee@linaro.org \
--cc=christoffer.dall@arm.com \
--cc=eric.auger@redhat.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=qemu-arm@nongnu.org \
--cc=shashi.mallela@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).