From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14926C433DF for ; Wed, 1 Jul 2020 18:57:52 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D71842082F for ; Wed, 1 Jul 2020 18:57:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="VMqpMGul" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D71842082F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2u5be7/7FJ89Kz4yxpKf+hxerOBeKgTAiTJSO5hJ95g=; b=VMqpMGulji2ySvesJ187sSSht W62l9axNSR3/NLWJMfczuN5jnIlGqemRiaGwF/dnD/qGxzkXd1kPLfm88p/B7Q5Nf3zAPRJI4XQj0 U3SOne4zllgyfwK6mpS0oGXrImdE9Jb3oqI708+3e/ihuNLLyh2zsT4LC4mOCYkVlUP5xPPNXTpZ1 eMPNO6Bd/AQw23Ch4huto2+z3BW9s9I/eRDnUCRLHc1gHuoK3DIl6ibpN3ovOLfvvyZpUb0oYwdTn RaQOpQh+HaxA04icfmxYe2EA3uaR4sa+V5777PzZN8G35qVrF9dVa33tYRw7mynPzIDi0L08dU2hF DNULiyZag==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jqhuI-0002Vt-4c; Wed, 01 Jul 2020 18:56:30 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jqhuG-0002Va-4f for linux-arm-kernel@lists.infradead.org; Wed, 01 Jul 2020 18:56:28 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 27DFF1FB; Wed, 1 Jul 2020 11:56:27 -0700 (PDT) Received: from [10.57.21.32] (unknown [10.57.21.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9501A3F68F; Wed, 1 Jul 2020 11:56:23 -0700 (PDT) Subject: Re: [PATCH v8 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage To: Krishna Reddy , Jonathan Hunter References: <20200630001051.12350-1-vdumpa@nvidia.com> <20200630001051.12350-2-vdumpa@nvidia.com> <53bfa5c8-c32d-6fa3-df60-a18ab33ca1c2@nvidia.com> From: Robin Murphy Message-ID: <9ae6b6e6-bd64-9c89-49ca-1f5785ef3f0c@arm.com> Date: Wed, 1 Jul 2020 19:56:17 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200701_145628_262416_09CBBEA0 X-CRM114-Status: GOOD ( 19.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Timo Alho , Thierry Reding , Bryan Huntsman , "linux-kernel@vger.kernel.org" , "iommu@lists.linux-foundation.org" , Mikko Perttunen , "nicoleotsuka@gmail.com" , Sachin Nikam , Nicolin Chen , "linux-tegra@vger.kernel.org" , Yu-Huan Hsu , Pritesh Raithatha , "will@kernel.org" , "linux-arm-kernel@lists.infradead.org" , Bitan Biswas Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-07-01 19:18, Krishna Reddy wrote: >>> + * When Linux kernel supports multiple SMMU devices, the SMMU >>> device +used for + * isochornous HW devices should be added as a >>> separate ARM MMU-500 +device + * in DT and be programmed >>> independently for efficient TLB invalidates. > >> I don't understand the "When" there - the driver has always >> supported multiple independent SMMUs, and it's not something that >> could be configured out or otherwise disabled. Plus I really don't >> see why you would ever want to force unrelated SMMUs to be >> >programmed together - beyond the TLB thing mentioned it would also >> waste precious context bank resources and might lead to weird >> device grouping via false stream ID aliasing, with no obvious >> upside at all. > > Sorry, I missed this comment. During the initial patches, when the > iommu_ops were different between, support multiple SMMU drivers at > the same is not possible as one of them(that gets probed last) > overwrites the platform bus ops. On revisiting the original issue, > This problem is no longer relevant. At this point, It makes more > sense to just get rid of 3rd instance programming in > arm-smmu-nvidia.c and just limit it to the SMMU instances that need > identical programming. Yeah, I realised later last night that this probably originated from forking the whole driver downstream. But even then you could have treated the other one as a separate nsmmu with a single instance ;) Since it does add a bit of confusion to the code and comments, let's just keep things simple. I do like Jon's suggestion of actually enforcing that the number of "reg" regions exactly matches the number expected for the given compatible - I guess for now that means just hard-coding 2 and hoping the hardware folks don't cook up any more of these... Robin. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel