From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1856FC433E0 for ; Thu, 6 Aug 2020 12:22:09 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DFE2E204FD for ; Thu, 6 Aug 2020 12:22:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Bc3pcrPG" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DFE2E204FD Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=f9xUmc9aBhhticdfFmUS/ecAX+sqTUoXKueoRTDI99g=; b=Bc3pcrPGTx5dakHzGPr03gdEu dqi0QepV1vPyVSqi1OhjTc2KToLkBRJM9E31Ins5i11WisKQk+oa6PiWWd5+/rIeDsptFqzpGL+LT cynyvxr/1snyfU3L+jLrZVKdNqYcTOl8SV6xEYJAXeMfpbL1Z23z4W7od6j1T6u3zuKbjKVbbpXz5 DoTuWBYoamsR+pIQsXYqTmRyuDIIAoWv2Uca2BdrCLsobsuihD+3r3fI+la9UF6kdpW7bO0TDwSVk R/MM6FGcsXxRH7wugXi4I9fh13WvxKMZ4CDU+aKXQAopH52e3wZVQ2OSggj7N3TYICJbMY5fasI5D CaxyjFiOg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k3etE-0003yt-G8; Thu, 06 Aug 2020 12:20:56 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k3etB-0003xh-Np for linux-arm-kernel@lists.infradead.org; Thu, 06 Aug 2020 12:20:54 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 98E6D30E; Thu, 6 Aug 2020 05:20:50 -0700 (PDT) Received: from [192.168.0.57] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2A9493F99C; Thu, 6 Aug 2020 05:20:49 -0700 (PDT) Subject: Re: [PATCH] arm64/relocate_kernel: remove redundant but misleading code To: Pingfan Liu , linux-arm-kernel@lists.infradead.org References: <1596702378-29550-1-git-send-email-kernelfans@gmail.com> From: James Morse Message-ID: <9b0da257-785b-90ba-de3c-b9ee9ccdeeba@arm.com> Date: Thu, 6 Aug 2020 13:20:43 +0100 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <1596702378-29550-1-git-send-email-kernelfans@gmail.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200806_082053_891692_2B6885AF X-CRM114-Status: GOOD ( 23.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Kees Cook , Geoff Levand , Catalin Marinas , Mark Brown , Remi Denis-Courmont , Will Deacon , Ard Biesheuvel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Liu, On 06/08/2020 09:26, Pingfan Liu wrote: > The kexec switch sequence looks like the following: > SYM_CODE_START(__cpu_soft_restart) > ... > pre_disable_mmu_workaround > msr sctlr_el1, x12 > ... > br x8 > > SYM_CODE_START(arm64_relocate_new_kernel) > ... > pre_disable_mmu_workaround > msr sctlr_el2, x0 > ... > "msr sctlr_el2, x0" is misleading, because "br x8" jump to a physical > address, which has no entry in idmap. Even better: this code run from a copy allocated by kexec, its not in the idmap either. See the memcpy() in machine_kexec(). > It implies that MMU has already been fully off after "msr sctlr_el1, x12". > And according to "D12.2.101 SCTLR_EL2, System Control Register (EL2)" in > "ARM Architecture Reference Manual", actually, EL2&0 host accesses > to SCTLR_EL2 when using mnemonic SCTLR_EL1. Only when HCR_EL2.E2H is enabled. If linux booted at EL2 on a non-VHE system, SCTLR_EL1 and SCTLR_EL2 are different registers, both of which are managed by linux/KVM. > Hence removing the redundant but misleading code. This isn't the reason its redundant... > diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S > index 4a18055..37721eb 100644 > --- a/arch/arm64/kernel/cpu-reset.S > +++ b/arch/arm64/kernel/cpu-reset.S > @@ -35,6 +35,10 @@ SYM_CODE_START(__cpu_soft_restart) > mov_q x13, SCTLR_ELx_FLAGS > bic x12, x12, x13 > pre_disable_mmu_workaround > + /* > + * either disable EL1&0 translation regime or disable EL2&0 translation > + * regime if HCR_EL2.E2H == 1 > + */> msr sctlr_el1, x12 > isb On a VHE system, yes the cpu-reset.S disables EL2&0 by writing to SCTLR_EL1 But on a non-VHE system, that same code disabled EL1&0. cup-reset.S goes on to call HVC_SOFT_RESTART for EL2, which may be serviced by KVM or the hyp-stub. (or maybe something else that implements the hyp-stub api) For kexec, on non-VHE both EL1&0 and EL2 get disabled. > diff --git a/arch/arm64/kernel/relocate_kernel.S b/arch/arm64/kernel/relocate_kernel.S > index 542d6ed..84eec95 100644 > --- a/arch/arm64/kernel/relocate_kernel.S > +++ b/arch/arm64/kernel/relocate_kernel.S > @@ -36,18 +36,6 @@ SYM_CODE_START(arm64_relocate_new_kernel) > mov x14, xzr /* x14 = entry ptr */ > mov x13, xzr /* x13 = copy dest */ > > - /* Clear the sctlr_el2 flags. */ > - mrs x0, CurrentEL > - cmp x0, #CurrentEL_EL2 > - b.ne 1f > - mrs x0, sctlr_el2 > - mov_q x1, SCTLR_ELx_FLAGS > - bic x0, x0, x1 > - pre_disable_mmu_workaround > - msr sctlr_el2, x0 > - isb > -1: I agree this doesn't disable the MMU anymore. This was originally kept to disable the I+C bits when Kdump interrupted KVM, but since KVM formalised the hyp-stub API, and has this exact sequence to back its HVC_SOFT_RESTART, it was only needed for the hyp-stub itself, which has no clue about these SCTLR_EL2 bits. HVC_SOFT_RESTART only says it needs to disable the MMU. See Documentation/virt/kvm/arm/hyp-abi.rst I think its fine to remove this, but the reason is because el2_setup doesn't set those bits, and KVM clears them when its unloaded, or has a HVC_SOFT_RESTART call. It might be worth updating the document, but we'd need to check the guarantee is the same on 32bit. I assume there is no out-of-tree user of the hyp-stub abi. I don't think the E2H register redirection has anything to do with this. Thanks, James _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel