From: Nicolas Ferre <nicolas.ferre@microchip.com>
To: Claudiu Beznea <claudiu.beznea@microchip.com>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>
Cc: <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 13/15] clk: at91: sama7g5: remove prescaler part of master clock
Date: Fri, 15 Oct 2021 10:07:12 +0200 [thread overview]
Message-ID: <9ba33681-f65d-1b65-22ef-85ef973b723a@microchip.com> (raw)
In-Reply-To: <20211011112719.3951784-14-claudiu.beznea@microchip.com>
On 11/10/2021 at 13:27, Claudiu Beznea wrote:
> On SAMA7G5 the prescaler part of master clock has been implemented as a
> changeable one. Everytime the prescaler is changed the PMC_SR.MCKRDY bit
> must be polled. Value 1 for PMC_SR.MCKRDY means the prescaler update is
> done. Driver polls for this bit until it becomes 1. On SAMA7G5 it has
> been discovered that in some conditions the PMC_SR.MCKRDY is not rising
> but the rate it provides it's stable. The workaround is to add a timeout
> when polling for PMC_SR.MCKRDY. At the moment, for SAMA7G5, the prescaler
> will be removed from Linux clock tree as all the frequencies for CPU could
> be obtained from PLL and also there will be less overhead when changing
> frequency via DVFS.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Indeed:
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> ---
> drivers/clk/at91/sama7g5.c | 11 +----------
> 1 file changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
> index c66bde6f7b47..fd9d17eabf54 100644
> --- a/drivers/clk/at91/sama7g5.c
> +++ b/drivers/clk/at91/sama7g5.c
> @@ -992,16 +992,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
> }
>
> parent_names[0] = "cpupll_divpmcck";
> - hw = at91_clk_register_master_pres(regmap, "cpuck", 1, parent_names,
> - &mck0_layout, &mck0_characteristics,
> - &pmc_mck0_lock,
> - CLK_SET_RATE_PARENT, 0);
> - if (IS_ERR(hw))
> - goto err_free;
> -
> - sama7g5_pmc->chws[PMC_CPU] = hw;
> -
> - hw = at91_clk_register_master_div(regmap, "mck0", "cpuck",
> + hw = at91_clk_register_master_div(regmap, "mck0", "cpupll_divpmcck",
> &mck0_layout, &mck0_characteristics,
> &pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);
> if (IS_ERR(hw))
>
--
Nicolas Ferre
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linux-arm-kernel@lists.infradead.org
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next prev parent reply other threads:[~2021-10-15 8:14 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-11 11:27 [PATCH v5 00/15] clk: at91: updates for power management and dvfs Claudiu Beznea
2021-10-11 11:27 ` [PATCH v5 01/15] clk: at91: re-factor clocks suspend/resume Claudiu Beznea
2021-10-15 7:46 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 02/15] clk: at91: pmc: execute suspend/resume only for backup mode Claudiu Beznea
2021-10-15 7:51 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 03/15] clk: at91: sama7g5: add securam's peripheral clock Claudiu Beznea
2021-10-11 11:27 ` [PATCH v5 04/15] clk: at91: clk-master: add register definition for sama7g5's master clock Claudiu Beznea
2021-10-15 7:52 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 05/15] clk: at91: clk-master: improve readability by using local variables Claudiu Beznea
2021-10-15 7:53 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 06/15] clk: at91: pmc: add sama7g5 to the list of available pmcs Claudiu Beznea
2021-10-15 7:54 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 07/15] clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL Claudiu Beznea
2021-10-15 7:54 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 08/15] clk: at91: clk-master: check if div or pres is zero Claudiu Beznea
2021-10-15 7:55 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 09/15] clk: at91: clk-master: mask mckr against layout->mask Claudiu Beznea
2021-10-15 7:56 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 10/15] clk: at91: clk-master: fix prescaler logic Claudiu Beznea
2021-10-15 7:58 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 11/15] clk: at91: clk-sam9x60-pll: add notifier for div part of PLL Claudiu Beznea
2021-10-15 8:01 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 12/15] clk: at91: clk-master: add notifier for divider Claudiu Beznea
2021-10-15 8:06 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 13/15] clk: at91: sama7g5: remove prescaler part of master clock Claudiu Beznea
2021-10-15 8:07 ` Nicolas Ferre [this message]
2021-10-11 11:27 ` [PATCH v5 14/15] clk: at91: sama7g5: set low limit for mck0 at 32KHz Claudiu Beznea
2021-10-15 8:07 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 15/15] clk: use clk_core_get_rate_recalc() in clk_rate_get() Claudiu Beznea
2021-10-15 8:08 ` Nicolas Ferre
2021-10-27 1:26 ` Stephen Boyd
2021-10-27 7:01 ` Claudiu.Beznea
2021-10-15 8:33 ` [PATCH v5 00/15] clk: at91: updates for power management and dvfs Nicolas Ferre
2021-10-27 1:35 ` Stephen Boyd
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