Re: [PATCH v2 3/4] spi: Split transfers larger than max size

From: Eddie James <eajames@linux.ibm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Vincent Whitchurch <vincent.whitchurch@axis.com>,
	krzysztof.kozlowski@linaro.org, andi@etezian.org,
	kernel@axis.com, alim.akhtar@samsung.com,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 3/4] spi: Split transfers larger than max size
Date: Fri, 23 Jun 2023 11:45:19 -0500	[thread overview]
Message-ID: <9cc6addc-cd41-7794-79a0-5c776946f492@linux.ibm.com> (raw)
In-Reply-To: <ZJS6OnzRapPCboC8@finisterre.sirena.org.uk>

On 6/22/23 16:16, Mark Brown wrote:
> On Thu, Jun 22, 2023 at 02:48:36PM -0500, Eddie James wrote:
>> On 9/27/22 06:21, Vincent Whitchurch wrote:
>>> A couple of drivers call spi_split_transfers_maxsize() from their
>>> ->prepare_message() callbacks to split transfers which are too big for
>>> them to handle.  Add support in the core to do this based on
>>> ->max_transfer_size() to avoid code duplication.
>> I've been testing AT25 functionality in linux 6.1 and I believe this patch
>> is breaking the AT25 protocol. It will split a write command up such that
>> some of the data is in a different transfer than  the write enable and
>> address. According to my understanding of the AT25 spec, that doesn't
>> work... Someone correct me if I'm wrong though. Do we need a flag to
>> enable/disable this behavior depending on the client perhaps?
> Could you be more specific about the manner in which you think this is
> breaking things?  The size of transfer is immaterial to the client
> device on SPI, the client will be counting clocks while the chip select
> is asserted.  How the controller chooses to split things up is really
> not particularly visible or relevant, it might bitbang things out one
> bit at a time, transfer a single word at a time or batch things up
> further.  So long as the chip select is asserted it's all the same to
> the client device.

Ok, I understand better now. Agreed it shouldn't make a difference, but 
this is actually a limitation of the spi controller I'm using (spi-fsi). 
The controller cannot handle multiple transfers keeping the chip select 
enabled... I guess the driver can batch transfers in the message to get 
around this, unless you want to add a flag for that behavior.

>
> In any case this is all based on the maximum transfer size advertised by
> the conteroller driver, if the device can physically handle larger
> transfers then there's no reason for it to set a limit.  If the driver
> can't physically handle larger transfers and it does make a difference
> then the system simply won't work.

Yep, this is also an artifact of the spi-fsi driver having different 
transfer size limits for writes and reads. Funnily enough the at25 
driver doesn't truly respect the max transfer size (it doesn't include 
the write command and address bytes in the calculation against the max 
transfer size) so that's how this worked previously.

Thanks!

Eddie

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