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SRVR:AM0PR04MB5875; H:AM0PR04MB4211.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: P4OPUsnL9CRVIJXitAmvsoHtQsRxl6tMRfLk3cG+M7XWpEmT0NQV+lw/X0eR8ubKOPitmkT/x0o2Ak7BbdKoQIcBh3ls2Au4h6eRdYbL6MhEEoENlVygIyUxWdR8+zFM+Heh/VoEgpLCtxlk9Umwfh5Fhu+JSi82UHUXXxfuM/n2y7qbXieX/DjR/Z4U7aqXLLMBufzmzGld/mItCL2q0+3QrsTRhc9ggsKu143/lxBkIGfIiqt+xNWVPI1MIBITwJUm879NVYFiOFhlDWg3USMA3m+wwwn+Ttq8eCudTa81FIy5GqwBp4qvRsYvccmBJvUkweXQS6SSh65jOovgfMibJj7LFmhpvilNhpCYFWBFg5fmmSLbWV1Dn3ZMXyjMeTHbsJQWemYzWGGKfLFa53sWZTFN1Fmy6lPJ4Nb/c5s= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f42ede5a-2e72-4aec-ca3b-08d6df407844 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 May 2019 05:35:30.7349 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5875 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190522_223534_488637_8C277A84 X-CRM114-Status: GOOD ( 19.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , "mturquette@baylibre.com" , "robh+dt@kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , Fabio Estevam , "shawnguo@kernel.org" , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org > From: Leonard Crestez > Sent: Monday, May 20, 2019 7:45 PM > > On 30.04.2019 20:35, Aisheng Dong wrote: > > MX8QM and MX8QXP LPCG Clocks are mostly the same except they may > > reside in different subsystems across CPUs and also vary a bit on the > availability. > > > > Same as SCU clock, we want to move the clock definition into device > > tree which can fully decouple the dependency of Clock ID definition > > from device tree and make us be able to write a fully generic lpcg clock > driver. > > > > And we can also use the existence of clock nodes in device tree to > > address the device and clock availability differences across different SoCs. > > > > diff --git a/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt > > b/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt > > > > Required properties: > > +- compatible: Should be one of: > > + "fsl,imx8qxp-lpcg" > > + "fsl,imx8qm-lpcg" followed by "fsl,imx8qxp-lpcg". > > +- reg: Address and length of the register set. > > +- #clock-cells: Should be 1. One LPCG supports multiple clocks. > > +- clocks: Input parent clocks phandle array for each clock. > > +- bit-offset: An integer array indicating the bit offset for each clock. > > +- hw-autogate: Boolean array indicating whether supports HW > autogate for > > + each clock. > > +- clock-output-names: Shall be the corresponding names of the outputs. > > + NOTE this property must be specified in the same order > > + as the clock bit-offset and hw-autogate property. > > Splitting the LPCG areas is good but describing "bit-offset" and similar inside > devicetree seems excessively generic. > > Perhaps we could have many smaller imx8qxp-lpcg-sdhc, imx8qxp-lpcg-enet > etc where the actual clks inside each node are still defined in driver code. > If that way, we would have too many more compatible strings per clocks and we have to add more for new SoCs which I'd like to avoid. > > usdhc1: mmc@5b010000 { > > @@ -44,8 +66,8 @@ usdhc1: mmc@5b010000 { > > interrupt-parent = <&gic>; > > interrupts = ; > > reg = <0x5b010000 0x10000>; > > - clocks = <&conn_lpcg IMX8QXP_CONN_LPCG_SDHC0_IPG_CLK>, > > - <&conn_lpcg IMX8QXP_CONN_LPCG_SDHC0_PER_CLK>, > > - <&conn_lpcg IMX8QXP_CONN_LPCG_SDHC0_HCLK>; > > + clocks = <&sdhc0_lpcg 1>, > > + <&sdhc0_lpcg 0>, > > + <&sdhc0_lpcg 2>; > > This is less readable, can't we keep symbolic constants? I'm scared to define more macros for device clocks. It's usually a one time job and could be referenced easily by looking into the definition of sdhc0_lpcg in DT. So less readable may not be a real problem. Regards Dong Aisheng _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel