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From: Aisheng Dong <aisheng.dong@nxp.com>
To: "Mirela Rabulea (OSS)" <mirela.rabulea@oss.nxp.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"G.n. Zhou" <guoniu.zhou@nxp.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Cc: Peng Fan <peng.fan@nxp.com>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	dl-linux-imx <linux-imx@nxp.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"mchehab@kernel.org" <mchehab@kernel.org>,
	"hverkuil-cisco@xs4all.nl" <hverkuil-cisco@xs4all.nl>,
	"linux-media@vger.kernel.org" <linux-media@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"paul.kocialkowski@bootlin.com" <paul.kocialkowski@bootlin.com>,
	Daniel Baluta <daniel.baluta@nxp.com>,
	Robert Chiras <robert.chiras@nxp.com>,
	Laurentiu Palcu <laurentiu.palcu@nxp.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	 "ezequiel@collabora.com" <ezequiel@collabora.com>,
	Mirela Rabulea <mirela.rabulea@nxp.com>
Subject: RE: [PATCH v12] arm64: dts: imx8qxp: Add jpeg encoder/decoder nodes
Date: Wed, 19 May 2021 07:27:10 +0000	[thread overview]
Message-ID: <AM6PR04MB4966902A56A6D9B1B16BE3C6802B9@AM6PR04MB4966.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20210519065355.27615-1-mirela.rabulea@oss.nxp.com>

> From: Mirela Rabulea (OSS) <mirela.rabulea@oss.nxp.com>
> Sent: Wednesday, May 19, 2021 2:54 PM
> 
> Add dts for imaging subsytem, include jpeg nodes here.
> Tested on imx8qxp only, should work on imx8qm, but it was not tested.
> 
> Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
> ---
> Changes in v12:
>   Adress feedback from Shawn Guo:
>   - sort nodes based on unit address
>   Adress feedback from Aisheng Dong:
>   - Use clock indices for LPCG clocks in consumer nodes (jpegdec/jpegenc)
> 
>  .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 82 +++++++++++++++++++
>  arch/arm64/boot/dts/freescale/imx8qxp.dtsi    |  1 +
>  2 files changed, 83 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> new file mode 100644
> index 000000000000..2ee789930cbc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> @@ -0,0 +1,82 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2019-2021 NXP
> + * Zhou Guoniu <guoniu.zhou@nxp.com>
> + */
> +img_subsys: bus@58000000 {
> +	compatible = "simple-bus";
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	ranges = <0x58000000 0x0 0x58000000 0x1000000>;
> +
> +	img_ipg_clk: clock-img-ipg {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <200000000>;
> +		clock-output-names = "img_ipg_clk";
> +	};
> +
> +	jpegdec: jpegdec@58400000 {
> +		compatible = "nxp,imx8qxp-jpgdec";

Could you put non-lpcg nodes compatible string into soc-ss-xx.dtsi?
e.g.
imx8qxp-ss-img.dtsi

BTW, you may also want to add imx8qm-ss-img.dtsi for MX8QM.

Otherwise, I'm fine with this patch.

> +		reg = <0x58400000 0x00050000 >;
> +		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
> +			 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
> +		clock-names = "per", "ipg";
> +		assigned-clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
> +				  <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
> +		assigned-clock-rates = <200000000>, <200000000>;
> +		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
> +				<&pd IMX_SC_R_MJPEG_DEC_S0>,
> +				<&pd IMX_SC_R_MJPEG_DEC_S1>,
> +				<&pd IMX_SC_R_MJPEG_DEC_S2>,
> +				<&pd IMX_SC_R_MJPEG_DEC_S3>;
> +	};
> +
> +	jpegenc: jpegenc@58450000 {
> +		compatible = "nxp,imx8qxp-jpgenc";

Ditto

> +		reg = <0x58450000 0x00050000 >;
> +		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
> +			 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
> +		clock-names = "per", "ipg";
> +		assigned-clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
> +				  <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
> +		assigned-clock-rates = <200000000>, <200000000>;
> +		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
> +				<&pd IMX_SC_R_MJPEG_ENC_S0>,
> +				<&pd IMX_SC_R_MJPEG_ENC_S1>,
> +				<&pd IMX_SC_R_MJPEG_ENC_S2>,
> +				<&pd IMX_SC_R_MJPEG_ENC_S3>;
> +	};
> +
> +	img_jpeg_dec_lpcg: clock-controller@585d0000 {
> +		compatible = "fsl,imx8qxp-lpcg";
> +		reg = <0x585d0000 0x10000>;
> +		#clock-cells = <1>;
> +		clocks = <&img_ipg_clk>, <&img_ipg_clk>;
> +		clock-indices = <IMX_LPCG_CLK_0>,
> +				<IMX_LPCG_CLK_4>;
> +		clock-output-names = "img_jpeg_dec_lpcg_clk",
> +				     "img_jpeg_dec_lpcg_ipg_clk";
> +		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>;
> +	};
> +
> +	img_jpeg_enc_lpcg: clock-controller@585f0000 {
> +		compatible = "fsl,imx8qxp-lpcg";
> +		reg = <0x585f0000 0x10000>;
> +		#clock-cells = <1>;
> +		clocks = <&img_ipg_clk>, <&img_ipg_clk>;
> +		clock-indices = <IMX_LPCG_CLK_0>,
> +				<IMX_LPCG_CLK_4>;
> +		clock-output-names = "img_jpeg_enc_lpcg_clk",
> +				     "img_jpeg_enc_lpcg_ipg_clk";
> +		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>;
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index 1e6b4995091e..2d9589309bd0 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -258,6 +258,7 @@
>  	};
> 
>  	/* sorted in register address */
> +	#include "imx8-ss-img.dtsi"
>  	#include "imx8-ss-adma.dtsi"
>  	#include "imx8-ss-conn.dtsi"
>  	#include "imx8-ss-ddr.dtsi"
> --
> 2.17.1

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      reply	other threads:[~2021-05-19  7:29 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-19  6:53 [PATCH v12] arm64: dts: imx8qxp: Add jpeg encoder/decoder nodes Mirela Rabulea (OSS)
2021-05-19  7:27 ` Aisheng Dong [this message]

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