From: Vladimir Oltean <olteanv@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, netdev <netdev@vger.kernel.org>,
lkml <linux-kernel@vger.kernel.org>,
leoyang.li@nxp.com, Rob Herring <robh+dt@kernel.org>,
Alexander Stein <alexander.stein@mailbox.org>,
Shawn Guo <shawnguo@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] ARM: dts: ls1021a-tsn: Use interrupts for the SGMII PHYs
Date: Sat, 9 Nov 2019 23:37:22 +0200 [thread overview]
Message-ID: <CA+h21hqU2bW82Q5jReEhsP6fhLTEgpcXuyU3EsdKFOgNrogoTQ@mail.gmail.com> (raw)
In-Reply-To: <20191109210549.GB12999@lunn.ch>
On Sat, 9 Nov 2019 at 23:05, Andrew Lunn <andrew@lunn.ch> wrote:
>
> On Sat, Nov 09, 2019 at 08:52:54PM +0100, Alexander Stein wrote:
> > On Saturday, November 9, 2019, 4:21:51 PM CET Vladimir Oltean wrote:
> > > On 09/11/2019, Andrew Lunn <andrew@lunn.ch> wrote:
> > > > On Sat, Nov 09, 2019 at 12:56:42PM +0200, Vladimir Oltean wrote:
> > > >> On the LS1021A-TSN board, the 2 Atheros AR8031 PHYs for eth0 and eth1
> > > >> have interrupt lines connected to the shared IRQ2_B LS1021A pin.
> > > >>
> > > >> The interrupts are active low, but the GICv2 controller does not support
> > > >> active-low and falling-edge interrupts, so the only mode it can be
> > > >> configured in is rising-edge.
> > > >
> > > > Hi Vladimir
> > > >
> > > > So how does this work? The rising edge would occur after the interrupt
> > > > handler has completed? What triggers the interrupt handler?
> > > >
> > > > Andrew
> > > >
> > >
> > > Hi Andrew,
> > >
> > > I hope I am not terribly confused about this. I thought I am telling
> > > the interrupt controller to raise an IRQ as a result of the
> > > low-to-high transition of the electrical signal. Experimentation sure
> > > seems to agree with me. So the IRQ is generated immediately _after_
> > > the PHY has left the line in open drain and it got pulled up to Vdd.
> >
>
> > It is correct GIC only supports raising edge and active-high. The
> > IRQ[0:5] on ls1021a are a bit special though. They not directly
> > connected to GIC, but there is an optional inverter, enabled by
> > default.
>
> Ah, O.K. So configuring for a rising edge is actually giving a falling
> edge. Which is why it works.
>
> Actually supporting this correctly is going a cause some pain. I
> wonder how many DT files currently say rising/active high, when in
> fact falling/active low is actually being used? And when the IRQ
> controller really does support active low and falling, things brake?
>
> Vladimir, since this is a shared interrupt, you really should use
> active low here. Maybe the first step is to get control of the
> inverter, and define a DT binding which is not going to break
> backwards compatibility. And then wire up this interrupt.
>
> Andrew
Oh, ok, this is what you mean, thanks Alexander for the clarification.
This sure escalated quickly and is going to keep me busy for a while.
-Vladimir
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next prev parent reply other threads:[~2019-11-09 21:37 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-09 10:56 [PATCH] ARM: dts: ls1021a-tsn: Use interrupts for the SGMII PHYs Vladimir Oltean
2019-11-09 15:09 ` Andrew Lunn
2019-11-09 15:21 ` Vladimir Oltean
2019-11-09 19:52 ` Alexander Stein
2019-11-09 21:05 ` Andrew Lunn
2019-11-09 21:37 ` Vladimir Oltean [this message]
2019-11-09 21:56 ` Vladimir Oltean
[not found] ` <CA+h21hrqczuOhTzWFZKX0XvgjgTzHT=3AdCPvO_eSabOzA3OCQ@mail.gmail.com>
2019-11-09 17:21 ` Andrew Lunn
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