* [PATCH v9 0/4] Rockchip ISP Driver
@ 2019-11-06 12:01 Helen Koike
2019-11-06 12:01 ` [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format Helen Koike
` (2 more replies)
0 siblings, 3 replies; 11+ messages in thread
From: Helen Koike @ 2019-11-06 12:01 UTC (permalink / raw)
To: linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, Helen Koike, hans.verkuil, laurent.pinchart,
sakari.ailus, zhengsq, mchehab, ezequiel, linux-arm-kernel,
linux-media
Hello,
I'm submitting v9 of the Rockchip ISP driver to staging this time.
The main reason is that people are already using it from the mailing
list (including libcamera), and having it mainlined makes the workflow
easier. Also, it is easier for other people to contribute back (with code
or testing the driver).
We plan to actively work on this driver to get it our of staging.
I squashed the patches in a single commit. The previous series
splitted the commits by files, but since they had dependencies
on each other, it was harder to review.
This patchset is also available at:
https://gitlab.collabora.com/koike/linux/tree/rockchip/isp/v9
Libcamera patched to work with this version:
https://gitlab.collabora.com/koike/libcamera
(also sent to the mailing list)
Thanks
Helen
Changes in v9:
* dphy
- Move to staging
- replace memcpy by a directly assignment
- remove unecessary ret variable in rockchip_dphy_init
- s/0x1/1
- s/0x0/0
- coding style changes
- dphy_reg variable sizes
- variables from int to unsigned int
- rename functions to start with rk_
- rename dphy0 to rx
- fix hardcoded lane0 usage
- disable rx on power off
- general cleanups of unused variables
- Move to staging
- Previous patch series had a patch for file and the last commit would
add the Makefile bits to make it compile. But one file was dependent on
each other, so it doesn't make much sense to have a patch for each file
and it doesn't make it easier to review.
* capture.c
- replace v4l2_{dgb,info,warn,err} by dev_*
* isp_stats.c
- replace v4l2_{dgb,info,warn,err} by dev_*
- remove LOG_ISR_EXE_TIME ifndef's
- constify ops structs
- s/strlcpy/strscpy
- add missing mutex_destroy() calls in rkisp1_register_stats_vdev error path
* rkisp1.c:
- replace v4l2_{dgb,info,warn,err} by dev_*
- fix error returned in link_validate
- remove s_power() callback
- add regwrite/regread wrappers
- add macros RKISP1_DEF_SRC_PAD_FMT/RKISP1_DEF_SINK_PAD_FMT
- several minor cleanups
- s/RKISP1_ISP_PAD_SINK([^_])/RKISP1_ISP_PAD_SINK_VIDEO\1/
- merge tables rkisp1_isp_input_formats and rkisp1_isp_output_formats
- in_fmt and out_fmt as pointers
- simply struct rkisp1_isp_subdev to work correctly with try format
- fix crop/fmt propagation
* dev.h / dev.c / regs.c / regs.h / common.h
- replace v4l2_{dgb,info,warn,err} by dev_*
- s/pr_info/dev_dbg
- s/int size/unsigned int size
- remove module param rkisp1_debug
- coding style fixes
- fix error in subdev_notifier_bound, check dphy before assigning to sensor->dphy
- remove subdevs fixed size array from rkisp1_pipeline
- remove sensors list, as it can be identified from the media topology
- Kconfig: add COMPILE_TEST in the dependency
- use v4l2_pipeline_pm_use and remove _isp_pipeline_s_power() and _subdev_set_power()
- remove struct rkisp1_pipeline and retrieve pipeline information from the media framework
- remove remaining rk3288 code
- cache pixel rate control in sctruct sensor_async_subdev
- remove enum rkisp1_sd_type
Please see a more complete history of changes at
https://patchwork.kernel.org/cover/11066499/
Helen Koike (3):
media: staging: phy-rockchip-dphy: add Rockchip MIPI Synopsys DPHY
driver
media: staging: rkisp1: add Rockchip ISP1 driver
MAINTAINERS: add entry for Rockchip ISP1 driver
Shunqian Zheng (1):
media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
MAINTAINERS | 6 +
drivers/media/v4l2-core/v4l2-ioctl.c | 2 +
drivers/staging/media/Kconfig | 4 +
drivers/staging/media/Makefile | 2 +
.../staging/media/phy-rockchip-dphy/Kconfig | 11 +
.../staging/media/phy-rockchip-dphy/Makefile | 2 +
drivers/staging/media/phy-rockchip-dphy/TODO | 6 +
.../phy-rockchip-dphy/phy-rockchip-dphy.c | 400 ++++
.../bindings/media/rockchip-isp1.txt | 71 +
.../bindings/media/rockchip-mipi-dphy.txt | 38 +
.../uapi/v4l/pixfmt-meta-rkisp1-params.rst | 23 +
.../uapi/v4l/pixfmt-meta-rkisp1-stat.rst | 22 +
drivers/staging/media/rkisp1/Kconfig | 13 +
drivers/staging/media/rkisp1/Makefile | 7 +
drivers/staging/media/rkisp1/TODO | 20 +
drivers/staging/media/rkisp1/capture.c | 1869 +++++++++++++++++
drivers/staging/media/rkisp1/capture.h | 164 ++
drivers/staging/media/rkisp1/common.h | 98 +
drivers/staging/media/rkisp1/dev.c | 439 ++++
drivers/staging/media/rkisp1/dev.h | 67 +
drivers/staging/media/rkisp1/isp_params.c | 1604 ++++++++++++++
drivers/staging/media/rkisp1/isp_params.h | 50 +
drivers/staging/media/rkisp1/isp_stats.c | 494 +++++
drivers/staging/media/rkisp1/isp_stats.h | 60 +
drivers/staging/media/rkisp1/regs.c | 224 ++
drivers/staging/media/rkisp1/regs.h | 1525 ++++++++++++++
drivers/staging/media/rkisp1/rkisp1.c | 1246 +++++++++++
drivers/staging/media/rkisp1/rkisp1.h | 97 +
.../staging/media/rkisp1/uapi/rkisp1-config.h | 815 +++++++
include/uapi/linux/videodev2.h | 4 +
30 files changed, 9383 insertions(+)
create mode 100644 drivers/staging/media/phy-rockchip-dphy/Kconfig
create mode 100644 drivers/staging/media/phy-rockchip-dphy/Makefile
create mode 100644 drivers/staging/media/phy-rockchip-dphy/TODO
create mode 100644 drivers/staging/media/phy-rockchip-dphy/phy-rockchip-dphy.c
create mode 100644 drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-isp1.txt
create mode 100644 drivers/staging/media/rkisp1/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt
create mode 100644 drivers/staging/media/rkisp1/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst
create mode 100644 drivers/staging/media/rkisp1/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst
create mode 100644 drivers/staging/media/rkisp1/Kconfig
create mode 100644 drivers/staging/media/rkisp1/Makefile
create mode 100644 drivers/staging/media/rkisp1/TODO
create mode 100644 drivers/staging/media/rkisp1/capture.c
create mode 100644 drivers/staging/media/rkisp1/capture.h
create mode 100644 drivers/staging/media/rkisp1/common.h
create mode 100644 drivers/staging/media/rkisp1/dev.c
create mode 100644 drivers/staging/media/rkisp1/dev.h
create mode 100644 drivers/staging/media/rkisp1/isp_params.c
create mode 100644 drivers/staging/media/rkisp1/isp_params.h
create mode 100644 drivers/staging/media/rkisp1/isp_stats.c
create mode 100644 drivers/staging/media/rkisp1/isp_stats.h
create mode 100644 drivers/staging/media/rkisp1/regs.c
create mode 100644 drivers/staging/media/rkisp1/regs.h
create mode 100644 drivers/staging/media/rkisp1/rkisp1.c
create mode 100644 drivers/staging/media/rkisp1/rkisp1.h
create mode 100644 drivers/staging/media/rkisp1/uapi/rkisp1-config.h
--
2.22.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
2019-11-06 12:01 [PATCH v9 0/4] Rockchip ISP Driver Helen Koike
@ 2019-11-06 12:01 ` Helen Koike
2019-11-06 12:22 ` Hans Verkuil (hansverk)
2019-11-06 12:01 ` [PATCH v9 2/4] media: staging: phy-rockchip-dphy: add Rockchip MIPI Synopsys DPHY driver Helen Koike
2019-11-06 12:01 ` [PATCH v9 4/4] MAINTAINERS: add entry for Rockchip ISP1 driver Helen Koike
2 siblings, 1 reply; 11+ messages in thread
From: Helen Koike @ 2019-11-06 12:01 UTC (permalink / raw)
To: linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, Jacob Chen, hans.verkuil, laurent.pinchart,
sakari.ailus, zhengsq, mchehab, ezequiel, Helen Koike,
linux-arm-kernel, linux-media
From: Shunqian Zheng <zhengsq@rock-chips.com>
Add the Rockchip ISP1 specific processing parameter format
V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
[refactored for upstream]
Signed-off-by: Helen Koike <helen.koike@collabora.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
Changes in v9:
- Add reviewed-by tag from Laurent
Changes in v8: None
Changes in v7:
- s/IPU3/RK_ISP1
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index 315ac12c3e0a..ade990554caf 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1341,6 +1341,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata"; break;
case V4L2_META_FMT_D4XX: descr = "Intel D4xx UVC Metadata"; break;
case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
+ case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A params"; break;
+ case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A statistics"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index f98bbcced8ff..56798b09cd85 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -762,6 +762,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_D4XX v4l2_fourcc('D', '4', 'X', 'X') /* D4XX Payload Header metadata */
#define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */
+/* Vendor specific - used for RK_ISP1 camera sub-system */
+#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
+#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
+
/* priv field value to indicates that subsequent fields are valid. */
#define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
--
2.22.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v9 2/4] media: staging: phy-rockchip-dphy: add Rockchip MIPI Synopsys DPHY driver
2019-11-06 12:01 [PATCH v9 0/4] Rockchip ISP Driver Helen Koike
2019-11-06 12:01 ` [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format Helen Koike
@ 2019-11-06 12:01 ` Helen Koike
2019-11-08 20:28 ` kbuild test robot
2019-11-06 12:01 ` [PATCH v9 4/4] MAINTAINERS: add entry for Rockchip ISP1 driver Helen Koike
2 siblings, 1 reply; 11+ messages in thread
From: Helen Koike @ 2019-11-06 12:01 UTC (permalink / raw)
To: linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, Helen Koike, hans.verkuil, laurent.pinchart,
sakari.ailus, zhengsq, Jacob Chen, mchehab, ezequiel,
linux-arm-kernel, linux-media
Add driver for Rockchip MIPI Synopsys DPHY
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
[migrate to phy framework]
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
[refactored for upstream]
Signed-off-by: Helen Koike <helen.koike@collabora.com>
---
Changes in v9:
dphy
- Move to staging
- replace memcpy by a directly assignment
- remove unecessary ret variable in rockchip_dphy_init
- s/0x1/1
- s/0x0/0
- coding style changes
- dphy_reg variable sizes
- variables from int to unsigned int
- rename functions to start with rk_
- rename dphy0 to rx
- fix hardcoded lane0 usage
- disable rx on power off
- general cleanups of unused variables
Changes in v8:
- Remove boiler plate license text
Changes in v7:
- Migrate dphy specific code from
drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
to drivers/phy/rockchip/phy-rockchip-dphy.c
- Drop support for rk3288
- Drop support for dphy txrx
- code styling and checkpatch fixes
drivers/staging/media/Kconfig | 2 +
drivers/staging/media/Makefile | 1 +
.../staging/media/phy-rockchip-dphy/Kconfig | 11 +
.../staging/media/phy-rockchip-dphy/Makefile | 2 +
drivers/staging/media/phy-rockchip-dphy/TODO | 3 +
.../phy-rockchip-dphy/phy-rockchip-dphy.c | 400 ++++++++++++++++++
6 files changed, 419 insertions(+)
create mode 100644 drivers/staging/media/phy-rockchip-dphy/Kconfig
create mode 100644 drivers/staging/media/phy-rockchip-dphy/Makefile
create mode 100644 drivers/staging/media/phy-rockchip-dphy/TODO
create mode 100644 drivers/staging/media/phy-rockchip-dphy/phy-rockchip-dphy.c
diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig
index 642adc4c24d2..a47484473883 100644
--- a/drivers/staging/media/Kconfig
+++ b/drivers/staging/media/Kconfig
@@ -38,4 +38,6 @@ source "drivers/staging/media/ipu3/Kconfig"
source "drivers/staging/media/soc_camera/Kconfig"
+source "drivers/staging/media/phy-rockchip-dphy/Kconfig"
+
endif
diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile
index 2f1711a8aeed..b0eae3906208 100644
--- a/drivers/staging/media/Makefile
+++ b/drivers/staging/media/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_TEGRA_VDE) += tegra-vde/
obj-$(CONFIG_VIDEO_HANTRO) += hantro/
obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/
obj-$(CONFIG_SOC_CAMERA) += soc_camera/
+obj-$(CONFIG_PHY_ROCKCHIP_DPHY) += phy-rockchip-dphy/
diff --git a/drivers/staging/media/phy-rockchip-dphy/Kconfig b/drivers/staging/media/phy-rockchip-dphy/Kconfig
new file mode 100644
index 000000000000..7378bd75fa7c
--- /dev/null
+++ b/drivers/staging/media/phy-rockchip-dphy/Kconfig
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Phy drivers for Rockchip platforms
+#
+config PHY_ROCKCHIP_DPHY
+ tristate "Rockchip MIPI Synopsys DPHY driver"
+ depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF
+ select GENERIC_PHY_MIPI_DPHY
+ select GENERIC_PHY
+ help
+ Enable this to support the Rockchip MIPI Synopsys DPHY.
diff --git a/drivers/staging/media/phy-rockchip-dphy/Makefile b/drivers/staging/media/phy-rockchip-dphy/Makefile
new file mode 100644
index 000000000000..24679dc950cd
--- /dev/null
+++ b/drivers/staging/media/phy-rockchip-dphy/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_PHY_ROCKCHIP_DPHY) += phy-rockchip-dphy.o
diff --git a/drivers/staging/media/phy-rockchip-dphy/TODO b/drivers/staging/media/phy-rockchip-dphy/TODO
new file mode 100644
index 000000000000..9003af535dc3
--- /dev/null
+++ b/drivers/staging/media/phy-rockchip-dphy/TODO
@@ -0,0 +1,3 @@
+The major reason for keeping this in staging is because the only driver
+who uses this is rkisp1 who is also in staging. It should be moved together
+rkisp1.
diff --git a/drivers/staging/media/phy-rockchip-dphy/phy-rockchip-dphy.c b/drivers/staging/media/phy-rockchip-dphy/phy-rockchip-dphy.c
new file mode 100644
index 000000000000..15eff7ca874c
--- /dev/null
+++ b/drivers/staging/media/phy-rockchip-dphy/phy-rockchip-dphy.c
@@ -0,0 +1,400 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Rockchip MIPI Synopsys DPHY driver
+ *
+ * Based on:
+ *
+ * Copyright (C) 2016 FuZhou Rockchip Co., Ltd.
+ * Author: Yakir Yang <ykk@@rock-chips.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/phy/phy.h>
+#include <linux/phy/phy-mipi-dphy.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define RK3399_GRF_SOC_CON9 0x6224
+#define RK3399_GRF_SOC_CON21 0x6254
+#define RK3399_GRF_SOC_CON22 0x6258
+#define RK3399_GRF_SOC_CON23 0x625c
+#define RK3399_GRF_SOC_CON24 0x6260
+#define RK3399_GRF_SOC_CON25 0x6264
+#define RK3399_GRF_SOC_STATUS1 0xe2a4
+
+#define CLOCK_LANE_HS_RX_CONTROL 0x34
+#define LANE0_HS_RX_CONTROL 0x44
+#define LANE1_HS_RX_CONTROL 0x54
+#define LANE2_HS_RX_CONTROL 0x84
+#define LANE3_HS_RX_CONTROL 0x94
+#define HS_RX_DATA_LANES_THS_SETTLE_CONTROL 0x75
+
+#define MAX_DPHY_CLK 8
+
+#define PHY_TESTEN_ADDR (1 << 16)
+#define PHY_TESTEN_DATA (0 << 16)
+#define PHY_TESTCLK (1 << 1)
+#define PHY_TESTCLR (1 << 0)
+#define THS_SETTLE_COUNTER_THRESHOLD 0x04
+
+#define GRF_SOC_CON12 0x0274
+
+#define GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK BIT(20)
+#define GRF_EDP_REF_CLK_SEL_INTER BIT(4)
+
+#define GRF_EDP_PHY_SIDDQ_HIWORD_MASK BIT(21)
+#define GRF_EDP_PHY_SIDDQ_ON 0
+#define GRF_EDP_PHY_SIDDQ_OFF BIT(5)
+
+struct hsfreq_range {
+ u16 range_h;
+ u8 cfg_bit;
+};
+
+static const struct hsfreq_range rk3399_mipidphy_hsfreq_ranges[] = {
+ { 89, 0x00 }, { 99, 0x10 }, { 109, 0x20 }, { 129, 0x01 },
+ { 139, 0x11 }, { 149, 0x21 }, { 169, 0x02 }, { 179, 0x12 },
+ { 199, 0x22 }, { 219, 0x03 }, { 239, 0x13 }, { 249, 0x23 },
+ { 269, 0x04 }, { 299, 0x14 }, { 329, 0x05 }, { 359, 0x15 },
+ { 399, 0x25 }, { 449, 0x06 }, { 499, 0x16 }, { 549, 0x07 },
+ { 599, 0x17 }, { 649, 0x08 }, { 699, 0x18 }, { 749, 0x09 },
+ { 799, 0x19 }, { 849, 0x29 }, { 899, 0x39 }, { 949, 0x0a },
+ { 999, 0x1a }, { 1049, 0x2a }, { 1099, 0x3a }, { 1149, 0x0b },
+ { 1199, 0x1b }, { 1249, 0x2b }, { 1299, 0x3b }, { 1349, 0x0c },
+ { 1399, 0x1c }, { 1449, 0x2c }, { 1500, 0x3c }
+ };
+
+static const char * const rk3399_mipidphy_clks[] = {
+ "dphy-ref",
+ "dphy-cfg",
+ "grf",
+};
+
+enum dphy_reg_id {
+ GRF_DPHY_RX0_TURNDISABLE = 0,
+ GRF_DPHY_RX0_FORCERXMODE,
+ GRF_DPHY_RX0_FORCETXSTOPMODE,
+ GRF_DPHY_RX0_ENABLE,
+ GRF_DPHY_RX0_TESTCLR,
+ GRF_DPHY_RX0_TESTCLK,
+ GRF_DPHY_RX0_TESTEN,
+ GRF_DPHY_RX0_TESTDIN,
+ GRF_DPHY_RX0_TURNREQUEST,
+ GRF_DPHY_RX0_TESTDOUT,
+ GRF_DPHY_TX0_TURNDISABLE,
+ GRF_DPHY_TX0_FORCERXMODE,
+ GRF_DPHY_TX0_FORCETXSTOPMODE,
+ GRF_DPHY_TX0_TURNREQUEST,
+ GRF_DPHY_TX1RX1_TURNDISABLE,
+ GRF_DPHY_TX1RX1_FORCERXMODE,
+ GRF_DPHY_TX1RX1_FORCETXSTOPMODE,
+ GRF_DPHY_TX1RX1_ENABLE,
+ GRF_DPHY_TX1RX1_MASTERSLAVEZ,
+ GRF_DPHY_TX1RX1_BASEDIR,
+ GRF_DPHY_TX1RX1_ENABLECLK,
+ GRF_DPHY_TX1RX1_TURNREQUEST,
+ GRF_DPHY_RX1_SRC_SEL,
+ /* rk3288 only */
+ GRF_CON_DISABLE_ISP,
+ GRF_CON_ISP_DPHY_SEL,
+ GRF_DSI_CSI_TESTBUS_SEL,
+ GRF_DVP_V18SEL,
+ /* below is for rk3399 only */
+ GRF_DPHY_RX0_CLK_INV_SEL,
+ GRF_DPHY_RX1_CLK_INV_SEL,
+};
+
+struct dphy_reg {
+ u16 offset;
+ u8 mask;
+ u8 shift;
+};
+
+#define PHY_REG(_offset, _width, _shift) \
+ { .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }
+
+static const struct dphy_reg rk3399_grf_dphy_regs[] = {
+ [GRF_DPHY_RX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON9, 4, 0),
+ [GRF_DPHY_RX0_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 10),
+ [GRF_DPHY_RX1_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 11),
+ [GRF_DPHY_RX0_ENABLE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 0),
+ [GRF_DPHY_RX0_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 4),
+ [GRF_DPHY_RX0_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 8),
+ [GRF_DPHY_RX0_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 12),
+ [GRF_DPHY_TX0_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 0),
+ [GRF_DPHY_TX0_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 4),
+ [GRF_DPHY_TX0_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 8),
+ [GRF_DPHY_TX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 12),
+ [GRF_DPHY_TX1RX1_ENABLE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 0),
+ [GRF_DPHY_TX1RX1_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 4),
+ [GRF_DPHY_TX1RX1_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 8),
+ [GRF_DPHY_TX1RX1_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 12),
+ [GRF_DPHY_TX1RX1_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON24, 4, 0),
+ [GRF_DPHY_RX1_SRC_SEL] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 4),
+ [GRF_DPHY_TX1RX1_BASEDIR] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 5),
+ [GRF_DPHY_TX1RX1_ENABLECLK] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 6),
+ [GRF_DPHY_TX1RX1_MASTERSLAVEZ] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 7),
+ [GRF_DPHY_RX0_TESTDIN] = PHY_REG(RK3399_GRF_SOC_CON25, 8, 0),
+ [GRF_DPHY_RX0_TESTEN] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 8),
+ [GRF_DPHY_RX0_TESTCLK] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 9),
+ [GRF_DPHY_RX0_TESTCLR] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 10),
+ [GRF_DPHY_RX0_TESTDOUT] = PHY_REG(RK3399_GRF_SOC_STATUS1, 8, 0),
+};
+
+struct dphy_drv_data {
+ const char * const *clks;
+ unsigned int num_clks;
+ const struct hsfreq_range *hsfreq_ranges;
+ unsigned int num_hsfreq_ranges;
+ const struct dphy_reg *regs;
+};
+
+struct rockchip_dphy {
+ struct device *dev;
+ struct regmap *grf;
+ struct clk_bulk_data clks[MAX_DPHY_CLK];
+
+ const struct dphy_drv_data *drv_data;
+ struct phy_configure_opts_mipi_dphy config;
+};
+
+static inline void rk_dphy_write_grf(struct rockchip_dphy *priv,
+ unsigned int index, u8 value)
+{
+ const struct dphy_reg *reg = &priv->drv_data->regs[index];
+ /* Update high word */
+ unsigned int val = (value << reg->shift) |
+ (reg->mask << (reg->shift + 16));
+
+ WARN_ON(!reg->offset);
+ regmap_write(priv->grf, reg->offset, val);
+}
+
+static void rk_dphy_write_rx(struct rockchip_dphy *priv,
+ u8 test_code, u8 test_data)
+{
+ /*
+ * With the falling edge on TESTCLK, the TESTDIN[7:0] signal content
+ * is latched internally as the current test code. Test data is
+ * programmed internally by rising edge on TESTCLK.
+ */
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLK, 1);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTDIN, test_code);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTEN, 1);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLK, 0);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTEN, 0);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTDIN, test_data);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLK, 1);
+}
+
+static void rk_dphy_rx_stream_on(struct rockchip_dphy *priv)
+{
+ const struct dphy_drv_data *drv_data = priv->drv_data;
+ struct phy_configure_opts_mipi_dphy *config = &priv->config;
+ unsigned int i, hsfreq = 0, data_rate_mbps = config->hs_clk_rate;
+
+ do_div(data_rate_mbps, 1000 * 1000);
+
+ dev_dbg(priv->dev, "%s: lanes %d - data_rate_mbps %u\n",
+ __func__, config->lanes, data_rate_mbps);
+
+ for (i = 0; i < drv_data->num_hsfreq_ranges; i++) {
+ if (drv_data->hsfreq_ranges[i].range_h >= data_rate_mbps) {
+ hsfreq = drv_data->hsfreq_ranges[i].cfg_bit;
+ break;
+ }
+ }
+
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_FORCERXMODE, 0);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_FORCETXSTOPMODE, 0);
+
+ /* Disable lane turn around, which is ignored in receive mode */
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TURNREQUEST, 0);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TURNDISABLE, 0xf);
+
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_ENABLE, GENMASK(config->lanes - 1, 0));
+
+ /* dphy start */
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLK, 1);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLR, 1);
+ usleep_range(100, 150);
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLR, 0);
+ usleep_range(100, 150);
+
+ /* set clock lane */
+ /* HS hsfreq_range & lane 0 settle bypass */
+ rk_dphy_write_rx(priv, CLOCK_LANE_HS_RX_CONTROL, 0);
+ /* HS RX Control of lane0 */
+ rk_dphy_write_rx(priv, LANE0_HS_RX_CONTROL, hsfreq << 1);
+ /* HS RX Control of lane1 */
+ rk_dphy_write_rx(priv, LANE1_HS_RX_CONTROL, hsfreq << 1);
+ /* HS RX Control of lane2 */
+ rk_dphy_write_rx(priv, LANE2_HS_RX_CONTROL, hsfreq << 1);
+ /* HS RX Control of lane3 */
+ rk_dphy_write_rx(priv, LANE3_HS_RX_CONTROL, hsfreq << 1);
+ /* HS RX Data Lanes Settle State Time Control */
+ rk_dphy_write_rx(priv, HS_RX_DATA_LANES_THS_SETTLE_CONTROL,
+ THS_SETTLE_COUNTER_THRESHOLD);
+
+ /* Normal operation */
+ rk_dphy_write_rx(priv, 0x0, 0);
+}
+
+static int rk_dphy_configure(struct phy *phy, union phy_configure_opts *opts)
+{
+ struct rockchip_dphy *priv = phy_get_drvdata(phy);
+ int ret;
+
+ /* pass with phy_mipi_dphy_get_default_config (with pixel rate?) */
+ ret = phy_mipi_dphy_config_validate(&opts->mipi_dphy);
+ if (ret)
+ return ret;
+
+ priv->config = opts->mipi_dphy;
+
+ return 0;
+}
+
+static int rk_dphy_power_on(struct phy *phy)
+{
+ struct rockchip_dphy *priv = phy_get_drvdata(phy);
+ int ret;
+
+ ret = clk_bulk_enable(priv->drv_data->num_clks, priv->clks);
+ if (ret)
+ return ret;
+
+ rk_dphy_rx_stream_on(priv);
+
+ return 0;
+}
+
+static int rk_dphy_power_off(struct phy *phy)
+{
+ struct rockchip_dphy *priv = phy_get_drvdata(phy);
+
+ rk_dphy_write_grf(priv, GRF_DPHY_RX0_ENABLE, 0);
+
+ clk_bulk_disable(priv->drv_data->num_clks, priv->clks);
+ return 0;
+}
+
+static int rk_dphy_init(struct phy *phy)
+{
+ struct rockchip_dphy *priv = phy_get_drvdata(phy);
+
+ return clk_bulk_prepare(priv->drv_data->num_clks, priv->clks);
+}
+
+static int rk_dphy_exit(struct phy *phy)
+{
+ struct rockchip_dphy *priv = phy_get_drvdata(phy);
+
+ clk_bulk_unprepare(priv->drv_data->num_clks, priv->clks);
+ return 0;
+}
+
+static const struct phy_ops rk_dphy_ops = {
+ .power_on = rk_dphy_power_on,
+ .power_off = rk_dphy_power_off,
+ .init = rk_dphy_init,
+ .exit = rk_dphy_exit,
+ .configure = rk_dphy_configure,
+ .owner = THIS_MODULE,
+};
+
+static const struct dphy_drv_data rk3399_mipidphy_drv_data = {
+ .clks = rk3399_mipidphy_clks,
+ .num_clks = ARRAY_SIZE(rk3399_mipidphy_clks),
+ .hsfreq_ranges = rk3399_mipidphy_hsfreq_ranges,
+ .num_hsfreq_ranges = ARRAY_SIZE(rk3399_mipidphy_hsfreq_ranges),
+ .regs = rk3399_grf_dphy_regs,
+};
+
+static const struct of_device_id rk_dphy_dt_ids[] = {
+ {
+ .compatible = "rockchip,rk3399-mipi-dphy",
+ .data = &rk3399_mipidphy_drv_data,
+ },
+ {}
+};
+MODULE_DEVICE_TABLE(of, rk_dphy_dt_ids);
+
+static int rk_dphy_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ const struct dphy_drv_data *drv_data;
+ struct phy_provider *phy_provider;
+ const struct of_device_id *of_id;
+ struct rockchip_dphy *priv;
+ struct regmap *grf;
+ struct phy *phy;
+ unsigned int i;
+ int ret;
+
+ if (!dev->parent || !dev->parent->of_node)
+ return -ENODEV;
+
+ if (platform_get_resource(pdev, IORESOURCE_MEM, 0)) {
+ dev_err(dev, "Rockchip DPHY driver only suports RX mode\n");
+ return -EINVAL;
+ }
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+ priv->dev = dev;
+
+ grf = syscon_node_to_regmap(dev->parent->of_node);
+ if (IS_ERR(grf)) {
+ grf = syscon_regmap_lookup_by_phandle(dev->of_node,
+ "rockchip,grf");
+ if (IS_ERR(grf)) {
+ dev_err(dev, "Can't find GRF syscon\n");
+ return -ENODEV;
+ }
+ }
+ priv->grf = grf;
+
+ of_id = of_match_device(rk_dphy_dt_ids, dev);
+ if (!of_id)
+ return -EINVAL;
+
+ drv_data = of_id->data;
+ priv->drv_data = drv_data;
+ for (i = 0; i < drv_data->num_clks; i++)
+ priv->clks[i].id = drv_data->clks[i];
+ ret = devm_clk_bulk_get(&pdev->dev, drv_data->num_clks, priv->clks);
+ if (ret)
+ return ret;
+
+ phy = devm_phy_create(dev, np, &rk_dphy_ops);
+ if (IS_ERR(phy)) {
+ dev_err(dev, "failed to create phy\n");
+ return PTR_ERR(phy);
+ }
+ phy_set_drvdata(phy, priv);
+
+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static struct platform_driver rk_dphy_driver = {
+ .probe = rk_dphy_probe,
+ .driver = {
+ .name = "rockchip-mipi-dphy",
+ .of_match_table = rk_dphy_dt_ids,
+ },
+};
+module_platform_driver(rk_dphy_driver);
+
+MODULE_AUTHOR("Ezequiel Garcia <ezequiel@collabora.com>");
+MODULE_DESCRIPTION("Rockchip MIPI Synopsys DPHY driver");
+MODULE_LICENSE("Dual MIT/GPL");
--
2.22.0
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^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v9 4/4] MAINTAINERS: add entry for Rockchip ISP1 driver
2019-11-06 12:01 [PATCH v9 0/4] Rockchip ISP Driver Helen Koike
2019-11-06 12:01 ` [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format Helen Koike
2019-11-06 12:01 ` [PATCH v9 2/4] media: staging: phy-rockchip-dphy: add Rockchip MIPI Synopsys DPHY driver Helen Koike
@ 2019-11-06 12:01 ` Helen Koike
2 siblings, 0 replies; 11+ messages in thread
From: Helen Koike @ 2019-11-06 12:01 UTC (permalink / raw)
To: linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, Helen Koike, hans.verkuil, laurent.pinchart,
sakari.ailus, zhengsq, mchehab, ezequiel, linux-arm-kernel,
linux-media
Add MAINTAINERS entry for the rockchip isp1 driver.
Signed-off-by: Helen Koike <helen.koike@collabora.com>
---
MAINTAINERS | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ea0dcc0b9763..ce162e2236d9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13933,6 +13933,12 @@ F: drivers/hid/hid-roccat*
F: include/linux/hid-roccat*
F: Documentation/ABI/*/sysfs-driver-hid-roccat*
+ROCKCHIP ISP V1 DRIVER
+M: Helen Koike <helen.koike@collabora.com>
+L: linux-media@vger.kernel.org
+S: Maintained
+F: drivers/staging/media/rkisp1/
+
ROCKCHIP RASTER 2D GRAPHIC ACCELERATION UNIT DRIVER
M: Jacob Chen <jacob-chen@iotwrt.com>
M: Ezequiel Garcia <ezequiel@collabora.com>
--
2.22.0
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^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
2019-11-06 12:01 ` [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format Helen Koike
@ 2019-11-06 12:22 ` Hans Verkuil (hansverk)
2019-11-06 12:30 ` Helen Koike
0 siblings, 1 reply; 11+ messages in thread
From: Hans Verkuil (hansverk) @ 2019-11-06 12:22 UTC (permalink / raw)
To: Helen Koike, linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, Jacob Chen, hans.verkuil, laurent.pinchart,
sakari.ailus, zhengsq, mchehab, ezequiel, linux-arm-kernel,
linux-media
On 11/6/19 1:01 PM, Helen Koike wrote:
> From: Shunqian Zheng <zhengsq@rock-chips.com>
>
> Add the Rockchip ISP1 specific processing parameter format
> V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
> V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
>
> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
I acked this? It is missing documentation for these new formats.
> [refactored for upstream]
> Signed-off-by: Helen Koike <helen.koike@collabora.com>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>
> ---
>
> Changes in v9:
> - Add reviewed-by tag from Laurent
>
> Changes in v8: None
> Changes in v7:
> - s/IPU3/RK_ISP1
>
> drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
> include/uapi/linux/videodev2.h | 4 ++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
> index 315ac12c3e0a..ade990554caf 100644
> --- a/drivers/media/v4l2-core/v4l2-ioctl.c
> +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
> @@ -1341,6 +1341,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
> case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata"; break;
> case V4L2_META_FMT_D4XX: descr = "Intel D4xx UVC Metadata"; break;
> case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
> + case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A params"; break;
params -> Params
> + case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A statistics"; break;
statistics -> Statistics
>
> default:
> /* Compressed formats */
> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> index f98bbcced8ff..56798b09cd85 100644
> --- a/include/uapi/linux/videodev2.h
> +++ b/include/uapi/linux/videodev2.h
> @@ -762,6 +762,10 @@ struct v4l2_pix_format {
> #define V4L2_META_FMT_D4XX v4l2_fourcc('D', '4', 'X', 'X') /* D4XX Payload Header metadata */
> #define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */
>
> +/* Vendor specific - used for RK_ISP1 camera sub-system */
> +#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
> +#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
> +
> /* priv field value to indicates that subsequent fields are valid. */
> #define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
>
>
Regards,
Hans
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
2019-11-06 12:22 ` Hans Verkuil (hansverk)
@ 2019-11-06 12:30 ` Helen Koike
2019-11-06 13:44 ` Ezequiel Garcia
0 siblings, 1 reply; 11+ messages in thread
From: Helen Koike @ 2019-11-06 12:30 UTC (permalink / raw)
To: Hans Verkuil (hansverk), linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, Jacob Chen, hans.verkuil, laurent.pinchart,
sakari.ailus, zhengsq, mchehab, ezequiel, linux-arm-kernel,
linux-media
On 11/6/19 10:22 AM, Hans Verkuil (hansverk) wrote:
> On 11/6/19 1:01 PM, Helen Koike wrote:
>> From: Shunqian Zheng <zhengsq@rock-chips.com>
>>
>> Add the Rockchip ISP1 specific processing parameter format
>> V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
>> V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
>>
>> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
>> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
>> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
>
> I acked this? It is missing documentation for these new formats.
I think so https://www.spinics.net/lists/linux-rockchip/msg18999.html :)
I'll update the docs and the fixes you pointed below.
Thanks.
Helen
>
>> [refactored for upstream]
>> Signed-off-by: Helen Koike <helen.koike@collabora.com>
>> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>>
>> ---
>>
>> Changes in v9:
>> - Add reviewed-by tag from Laurent
>>
>> Changes in v8: None
>> Changes in v7:
>> - s/IPU3/RK_ISP1
>>
>> drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
>> include/uapi/linux/videodev2.h | 4 ++++
>> 2 files changed, 6 insertions(+)
>>
>> diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
>> index 315ac12c3e0a..ade990554caf 100644
>> --- a/drivers/media/v4l2-core/v4l2-ioctl.c
>> +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
>> @@ -1341,6 +1341,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
>> case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata"; break;
>> case V4L2_META_FMT_D4XX: descr = "Intel D4xx UVC Metadata"; break;
>> case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
>> + case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A params"; break;
>
> params -> Params
>
>> + case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A statistics"; break;
>
> statistics -> Statistics
>
>>
>> default:
>> /* Compressed formats */
>> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
>> index f98bbcced8ff..56798b09cd85 100644
>> --- a/include/uapi/linux/videodev2.h
>> +++ b/include/uapi/linux/videodev2.h
>> @@ -762,6 +762,10 @@ struct v4l2_pix_format {
>> #define V4L2_META_FMT_D4XX v4l2_fourcc('D', '4', 'X', 'X') /* D4XX Payload Header metadata */
>> #define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */
>>
>> +/* Vendor specific - used for RK_ISP1 camera sub-system */
>> +#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
>> +#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
>> +
>> /* priv field value to indicates that subsequent fields are valid. */
>> #define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
>>
>>
>
> Regards,
>
> Hans
>
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
2019-11-06 12:30 ` Helen Koike
@ 2019-11-06 13:44 ` Ezequiel Garcia
2019-11-06 13:49 ` Hans Verkuil (hansverk)
2019-11-06 23:26 ` Helen Koike
0 siblings, 2 replies; 11+ messages in thread
From: Ezequiel Garcia @ 2019-11-06 13:44 UTC (permalink / raw)
To: Helen Koike, Hans Verkuil (hansverk), linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, hans.verkuil, laurent.pinchart,
sakari.ailus, Jacob Chen, mchehab, zhengsq, linux-arm-kernel,
linux-media
Hi Hans, Helen:
On Wed, 2019-11-06 at 09:30 -0300, Helen Koike wrote:
>
> On 11/6/19 10:22 AM, Hans Verkuil (hansverk) wrote:
> > On 11/6/19 1:01 PM, Helen Koike wrote:
> > > From: Shunqian Zheng <zhengsq@rock-chips.com>
> > >
> > > Add the Rockchip ISP1 specific processing parameter format
> > > V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
> > > V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
> > >
> > > Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
> > > Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
> > > Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
> >
> > I acked this? It is missing documentation for these new formats.
>
> I think so https://www.spinics.net/lists/linux-rockchip/msg18999.html :)
>
> I'll update the docs and the fixes you pointed below.
>
> Thanks.
> Helen
>
> > > [refactored for upstream]
> > > Signed-off-by: Helen Koike <helen.koike@collabora.com>
> > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > >
> > > ---
> > >
> > > Changes in v9:
> > > - Add reviewed-by tag from Laurent
> > >
> > > Changes in v8: None
> > > Changes in v7:
> > > - s/IPU3/RK_ISP1
> > >
> > > drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
> > > include/uapi/linux/videodev2.h | 4 ++++
> > > 2 files changed, 6 insertions(+)
> > >
> > > diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
> > > index 315ac12c3e0a..ade990554caf 100644
> > > --- a/drivers/media/v4l2-core/v4l2-ioctl.c
> > > +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
> > > @@ -1341,6 +1341,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
> > > case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata"; break;
> > > case V4L2_META_FMT_D4XX: descr = "Intel D4xx UVC Metadata"; break;
> > > case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
> > > + case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A params"; break;
> >
> > params -> Params
> >
> > > + case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A statistics"; break;
> >
> > statistics -> Statistics
> >
> > >
> > > default:
> > > /* Compressed formats */
> > > diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> > > index f98bbcced8ff..56798b09cd85 100644
> > > --- a/include/uapi/linux/videodev2.h
> > > +++ b/include/uapi/linux/videodev2.h
Can we avoid touching videodev2.h, as we did for the stateless codec pixfmts?
Thanks,
Ezequiel
> > > @@ -762,6 +762,10 @@ struct v4l2_pix_format {
> > > #define V4L2_META_FMT_D4XX v4l2_fourcc('D', '4', 'X', 'X') /* D4XX Payload Header metadata */
> > > #define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */
> > >
> > > +/* Vendor specific - used for RK_ISP1 camera sub-system */
> > > +#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
> > > +#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
> > > +
> > > /* priv field value to indicates that subsequent fields are valid. */
> > > #define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
> > >
> > >
> >
> > Regards,
> >
> > Hans
> >
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
2019-11-06 13:44 ` Ezequiel Garcia
@ 2019-11-06 13:49 ` Hans Verkuil (hansverk)
2019-11-06 23:26 ` Helen Koike
1 sibling, 0 replies; 11+ messages in thread
From: Hans Verkuil (hansverk) @ 2019-11-06 13:49 UTC (permalink / raw)
To: Ezequiel Garcia, Helen Koike, linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, hans.verkuil, laurent.pinchart,
sakari.ailus, Jacob Chen, mchehab, zhengsq, linux-arm-kernel,
linux-media
On 11/6/19 2:44 PM, Ezequiel Garcia wrote:
> Hi Hans, Helen:
>
> On Wed, 2019-11-06 at 09:30 -0300, Helen Koike wrote:
>>
>> On 11/6/19 10:22 AM, Hans Verkuil (hansverk) wrote:
>>> On 11/6/19 1:01 PM, Helen Koike wrote:
>>>> From: Shunqian Zheng <zhengsq@rock-chips.com>
>>>>
>>>> Add the Rockchip ISP1 specific processing parameter format
>>>> V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
>>>> V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
>>>>
>>>> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
>>>> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
>>>> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
>>>
>>> I acked this? It is missing documentation for these new formats.
>>
>> I think so https://www.spinics.net/lists/linux-rockchip/msg18999.html :)
Hmm, I probably had an off-day :-)
I noticed that the documentation was included in patch 3/4 (which didn't
reach the ML because it was too big), but I asked Helen to split off the
documentation into a separate patch (or add it to this patch).
Regards,
Hans
>>
>> I'll update the docs and the fixes you pointed below.
>>
>> Thanks.
>> Helen
>>
>>>> [refactored for upstream]
>>>> Signed-off-by: Helen Koike <helen.koike@collabora.com>
>>>> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>>>>
>>>> ---
>>>>
>>>> Changes in v9:
>>>> - Add reviewed-by tag from Laurent
>>>>
>>>> Changes in v8: None
>>>> Changes in v7:
>>>> - s/IPU3/RK_ISP1
>>>>
>>>> drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
>>>> include/uapi/linux/videodev2.h | 4 ++++
>>>> 2 files changed, 6 insertions(+)
>>>>
>>>> diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
>>>> index 315ac12c3e0a..ade990554caf 100644
>>>> --- a/drivers/media/v4l2-core/v4l2-ioctl.c
>>>> +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
>>>> @@ -1341,6 +1341,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
>>>> case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata"; break;
>>>> case V4L2_META_FMT_D4XX: descr = "Intel D4xx UVC Metadata"; break;
>>>> case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
>>>> + case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A params"; break;
>>>
>>> params -> Params
>>>
>>>> + case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A statistics"; break;
>>>
>>> statistics -> Statistics
>>>
>>>>
>>>> default:
>>>> /* Compressed formats */
>>>> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
>>>> index f98bbcced8ff..56798b09cd85 100644
>>>> --- a/include/uapi/linux/videodev2.h
>>>> +++ b/include/uapi/linux/videodev2.h
>
> Can we avoid touching videodev2.h, as we did for the stateless codec pixfmts?
>
> Thanks,
> Ezequiel
>
>>>> @@ -762,6 +762,10 @@ struct v4l2_pix_format {
>>>> #define V4L2_META_FMT_D4XX v4l2_fourcc('D', '4', 'X', 'X') /* D4XX Payload Header metadata */
>>>> #define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */
>>>>
>>>> +/* Vendor specific - used for RK_ISP1 camera sub-system */
>>>> +#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
>>>> +#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
>>>> +
>>>> /* priv field value to indicates that subsequent fields are valid. */
>>>> #define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
>>>>
>>>>
>>>
>>> Regards,
>>>
>>> Hans
>>>
>
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
2019-11-06 13:44 ` Ezequiel Garcia
2019-11-06 13:49 ` Hans Verkuil (hansverk)
@ 2019-11-06 23:26 ` Helen Koike
2019-11-07 3:08 ` Tomasz Figa
1 sibling, 1 reply; 11+ messages in thread
From: Helen Koike @ 2019-11-06 23:26 UTC (permalink / raw)
To: Ezequiel Garcia, Hans Verkuil (hansverk), linux-rockchip
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, tfiga, hans.verkuil, laurent.pinchart,
sakari.ailus, Jacob Chen, mchehab, zhengsq, linux-arm-kernel,
linux-media
On 11/6/19 11:44 AM, Ezequiel Garcia wrote:
> Hi Hans, Helen:
>
> On Wed, 2019-11-06 at 09:30 -0300, Helen Koike wrote:
>>
>> On 11/6/19 10:22 AM, Hans Verkuil (hansverk) wrote:
>>> On 11/6/19 1:01 PM, Helen Koike wrote:
>>>> From: Shunqian Zheng <zhengsq@rock-chips.com>
>>>>
>>>> Add the Rockchip ISP1 specific processing parameter format
>>>> V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
>>>> V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
>>>>
>>>> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
>>>> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
>>>> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
>>>
>>> I acked this? It is missing documentation for these new formats.
>>
>> I think so https://www.spinics.net/lists/linux-rockchip/msg18999.html :)
>>
>> I'll update the docs and the fixes you pointed below.
>>
>> Thanks.
>> Helen
>>
>>>> [refactored for upstream]
>>>> Signed-off-by: Helen Koike <helen.koike@collabora.com>
>>>> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>>>>
>>>> ---
>>>>
>>>> Changes in v9:
>>>> - Add reviewed-by tag from Laurent
>>>>
>>>> Changes in v8: None
>>>> Changes in v7:
>>>> - s/IPU3/RK_ISP1
>>>>
>>>> drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
>>>> include/uapi/linux/videodev2.h | 4 ++++
>>>> 2 files changed, 6 insertions(+)
>>>>
>>>> diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
>>>> index 315ac12c3e0a..ade990554caf 100644
>>>> --- a/drivers/media/v4l2-core/v4l2-ioctl.c
>>>> +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
>>>> @@ -1341,6 +1341,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
>>>> case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata"; break;
>>>> case V4L2_META_FMT_D4XX: descr = "Intel D4xx UVC Metadata"; break;
>>>> case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
>>>> + case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A params"; break;
>>>
>>> params -> Params
>>>
>>>> + case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A statistics"; break;
>>>
>>> statistics -> Statistics
>>>
>>>>
>>>> default:
>>>> /* Compressed formats */
>>>> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
>>>> index f98bbcced8ff..56798b09cd85 100644
>>>> --- a/include/uapi/linux/videodev2.h
>>>> +++ b/include/uapi/linux/videodev2.h
>
> Can we avoid touching videodev2.h, as we did for the stateless codec pixfmts?
I think it should be part of the uapi, as it is the metadata format used in the video output device.
I propose to leave it inside drivers/staging/media/rkisp1/uapi/rkisp1-config.h while the driver is in staging,
then we expose it later with a better documentation too. Make sense?
Thanks,
Helen
>
> Thanks,
> Ezequiel
>
>>>> @@ -762,6 +762,10 @@ struct v4l2_pix_format {
>>>> #define V4L2_META_FMT_D4XX v4l2_fourcc('D', '4', 'X', 'X') /* D4XX Payload Header metadata */
>>>> #define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */
>>>>
>>>> +/* Vendor specific - used for RK_ISP1 camera sub-system */
>>>> +#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
>>>> +#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
>>>> +
>>>> /* priv field value to indicates that subsequent fields are valid. */
>>>> #define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
>>>>
>>>>
>>>
>>> Regards,
>>>
>>> Hans
>>>
>
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format
2019-11-06 23:26 ` Helen Koike
@ 2019-11-07 3:08 ` Tomasz Figa
0 siblings, 0 replies; 11+ messages in thread
From: Tomasz Figa @ 2019-11-07 3:08 UTC (permalink / raw)
To: Helen Koike
Cc: eddie.cai.linux, kernel, heiko, gregkh, jeffy.chen, zyc,
linux-kernel, Jacob Chen, Hans Verkuil (hansverk),
linux-rockchip, hans.verkuil, laurent.pinchart, sakari.ailus,
zhengsq, mchehab, Ezequiel Garcia, linux-arm-kernel, linux-media
On Thu, Nov 7, 2019 at 8:26 AM Helen Koike <helen.koike@collabora.com> wrote:
>
>
>
> On 11/6/19 11:44 AM, Ezequiel Garcia wrote:
> > Hi Hans, Helen:
> >
> > On Wed, 2019-11-06 at 09:30 -0300, Helen Koike wrote:
> >>
> >> On 11/6/19 10:22 AM, Hans Verkuil (hansverk) wrote:
> >>> On 11/6/19 1:01 PM, Helen Koike wrote:
> >>>> From: Shunqian Zheng <zhengsq@rock-chips.com>
> >>>>
> >>>> Add the Rockchip ISP1 specific processing parameter format
> >>>> V4L2_META_FMT_RK_ISP1_PARAMS and metadata format
> >>>> V4L2_META_FMT_RK_ISP1_STAT_3A for 3A.
> >>>>
> >>>> Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
> >>>> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
> >>>> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
> >>>
> >>> I acked this? It is missing documentation for these new formats.
> >>
> >> I think so https://www.spinics.net/lists/linux-rockchip/msg18999.html :)
> >>
> >> I'll update the docs and the fixes you pointed below.
> >>
> >> Thanks.
> >> Helen
> >>
> >>>> [refactored for upstream]
> >>>> Signed-off-by: Helen Koike <helen.koike@collabora.com>
> >>>> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> >>>>
> >>>> ---
> >>>>
> >>>> Changes in v9:
> >>>> - Add reviewed-by tag from Laurent
> >>>>
> >>>> Changes in v8: None
> >>>> Changes in v7:
> >>>> - s/IPU3/RK_ISP1
> >>>>
> >>>> drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
> >>>> include/uapi/linux/videodev2.h | 4 ++++
> >>>> 2 files changed, 6 insertions(+)
> >>>>
> >>>> diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
> >>>> index 315ac12c3e0a..ade990554caf 100644
> >>>> --- a/drivers/media/v4l2-core/v4l2-ioctl.c
> >>>> +++ b/drivers/media/v4l2-core/v4l2-ioctl.c
> >>>> @@ -1341,6 +1341,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
> >>>> case V4L2_META_FMT_UVC: descr = "UVC Payload Header Metadata"; break;
> >>>> case V4L2_META_FMT_D4XX: descr = "Intel D4xx UVC Metadata"; break;
> >>>> case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
> >>>> + case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A params"; break;
> >>>
> >>> params -> Params
> >>>
> >>>> + case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A statistics"; break;
> >>>
> >>> statistics -> Statistics
> >>>
> >>>>
> >>>> default:
> >>>> /* Compressed formats */
> >>>> diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
> >>>> index f98bbcced8ff..56798b09cd85 100644
> >>>> --- a/include/uapi/linux/videodev2.h
> >>>> +++ b/include/uapi/linux/videodev2.h
> >
> > Can we avoid touching videodev2.h, as we did for the stateless codec pixfmts?
>
> I think it should be part of the uapi, as it is the metadata format used in the video output device.
> I propose to leave it inside drivers/staging/media/rkisp1/uapi/rkisp1-config.h while the driver is in staging,
> then we expose it later with a better documentation too. Make sense?
Makes sense, as it's also what we've done for ipu3, +/- a slightly
different path:
https://elixir.bootlin.com/linux/latest/source/drivers/staging/media/ipu3/include/intel-ipu3.h#L12
We could possibly move the header to include/rockchip-isp1.h to be consistent.
Best regards,
Tomasz
>
> Thanks,
> Helen
>
> >
> > Thanks,
> > Ezequiel
> >
> >>>> @@ -762,6 +762,10 @@ struct v4l2_pix_format {
> >>>> #define V4L2_META_FMT_D4XX v4l2_fourcc('D', '4', 'X', 'X') /* D4XX Payload Header metadata */
> >>>> #define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D') /* Vivid Metadata */
> >>>>
> >>>> +/* Vendor specific - used for RK_ISP1 camera sub-system */
> >>>> +#define V4L2_META_FMT_RK_ISP1_PARAMS v4l2_fourcc('R', 'K', '1', 'P') /* Rockchip ISP1 params */
> >>>> +#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A statistics */
> >>>> +
> >>>> /* priv field value to indicates that subsequent fields are valid. */
> >>>> #define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
> >>>>
> >>>>
> >>>
> >>> Regards,
> >>>
> >>> Hans
> >>>
> >
> >
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v9 2/4] media: staging: phy-rockchip-dphy: add Rockchip MIPI Synopsys DPHY driver
2019-11-06 12:01 ` [PATCH v9 2/4] media: staging: phy-rockchip-dphy: add Rockchip MIPI Synopsys DPHY driver Helen Koike
@ 2019-11-08 20:28 ` kbuild test robot
0 siblings, 0 replies; 11+ messages in thread
From: kbuild test robot @ 2019-11-08 20:28 UTC (permalink / raw)
To: Helen Koike
Cc: eddie.cai.linux, kernel, kbuild-all, heiko, gregkh, jeffy.chen,
zyc, linux-kernel, tfiga, linux-rockchip, Helen Koike,
hans.verkuil, laurent.pinchart, sakari.ailus, zhengsq,
Jacob Chen, mchehab, ezequiel, linux-arm-kernel, linux-media
[-- Attachment #1: Type: text/plain, Size: 13396 bytes --]
Hi Helen,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linuxtv-media/master]
[also build test WARNING on next-20191108]
[cannot apply to v5.4-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Helen-Koike/Rockchip-ISP-Driver/20191109-020448
base: git://linuxtv.org/media_tree.git master
config: mips-allmodconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from arch/mips/include/asm/div64.h:12:0,
from include/linux/kernel.h:18,
from include/linux/clk.h:13,
from drivers/staging//media/phy-rockchip-dphy/phy-rockchip-dphy.c:11:
drivers/staging//media/phy-rockchip-dphy/phy-rockchip-dphy.c: In function 'rk_dphy_rx_stream_on':
include/asm-generic/div64.h:226:28: warning: comparison of distinct pointer types lacks a cast
(void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
^
>> drivers/staging//media/phy-rockchip-dphy/phy-rockchip-dphy.c:201:2: note: in expansion of macro 'do_div'
do_div(data_rate_mbps, 1000 * 1000);
^~~~~~
In file included from include/linux/err.h:5:0,
from include/linux/clk.h:12,
from drivers/staging//media/phy-rockchip-dphy/phy-rockchip-dphy.c:11:
include/asm-generic/div64.h:239:25: warning: right shift count >= width of type [-Wshift-count-overflow]
} else if (likely(((n) >> 32) == 0)) { \
^
include/linux/compiler.h:77:40: note: in definition of macro 'likely'
# define likely(x) __builtin_expect(!!(x), 1)
^
>> drivers/staging//media/phy-rockchip-dphy/phy-rockchip-dphy.c:201:2: note: in expansion of macro 'do_div'
do_div(data_rate_mbps, 1000 * 1000);
^~~~~~
In file included from arch/mips/include/asm/div64.h:12:0,
from include/linux/kernel.h:18,
from include/linux/clk.h:13,
from drivers/staging//media/phy-rockchip-dphy/phy-rockchip-dphy.c:11:
include/asm-generic/div64.h:243:22: error: passing argument 1 of '__div64_32' from incompatible pointer type [-Werror=incompatible-pointer-types]
__rem = __div64_32(&(n), __base); \
^
>> drivers/staging//media/phy-rockchip-dphy/phy-rockchip-dphy.c:201:2: note: in expansion of macro 'do_div'
do_div(data_rate_mbps, 1000 * 1000);
^~~~~~
include/asm-generic/div64.h:217:17: note: expected 'uint64_t * {aka long long unsigned int *}' but argument is of type 'unsigned int *'
extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
^~~~~~~~~~
cc1: some warnings being treated as errors
vim +/do_div +201 drivers/staging//media/phy-rockchip-dphy/phy-rockchip-dphy.c
> 11 #include <linux/clk.h>
12 #include <linux/io.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/of_device.h>
17 #include <linux/phy/phy.h>
18 #include <linux/phy/phy-mipi-dphy.h>
19 #include <linux/platform_device.h>
20 #include <linux/regmap.h>
21
22 #define RK3399_GRF_SOC_CON9 0x6224
23 #define RK3399_GRF_SOC_CON21 0x6254
24 #define RK3399_GRF_SOC_CON22 0x6258
25 #define RK3399_GRF_SOC_CON23 0x625c
26 #define RK3399_GRF_SOC_CON24 0x6260
27 #define RK3399_GRF_SOC_CON25 0x6264
28 #define RK3399_GRF_SOC_STATUS1 0xe2a4
29
30 #define CLOCK_LANE_HS_RX_CONTROL 0x34
31 #define LANE0_HS_RX_CONTROL 0x44
32 #define LANE1_HS_RX_CONTROL 0x54
33 #define LANE2_HS_RX_CONTROL 0x84
34 #define LANE3_HS_RX_CONTROL 0x94
35 #define HS_RX_DATA_LANES_THS_SETTLE_CONTROL 0x75
36
37 #define MAX_DPHY_CLK 8
38
39 #define PHY_TESTEN_ADDR (1 << 16)
40 #define PHY_TESTEN_DATA (0 << 16)
41 #define PHY_TESTCLK (1 << 1)
42 #define PHY_TESTCLR (1 << 0)
43 #define THS_SETTLE_COUNTER_THRESHOLD 0x04
44
45 #define GRF_SOC_CON12 0x0274
46
47 #define GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK BIT(20)
48 #define GRF_EDP_REF_CLK_SEL_INTER BIT(4)
49
50 #define GRF_EDP_PHY_SIDDQ_HIWORD_MASK BIT(21)
51 #define GRF_EDP_PHY_SIDDQ_ON 0
52 #define GRF_EDP_PHY_SIDDQ_OFF BIT(5)
53
54 struct hsfreq_range {
55 u16 range_h;
56 u8 cfg_bit;
57 };
58
59 static const struct hsfreq_range rk3399_mipidphy_hsfreq_ranges[] = {
60 { 89, 0x00 }, { 99, 0x10 }, { 109, 0x20 }, { 129, 0x01 },
61 { 139, 0x11 }, { 149, 0x21 }, { 169, 0x02 }, { 179, 0x12 },
62 { 199, 0x22 }, { 219, 0x03 }, { 239, 0x13 }, { 249, 0x23 },
63 { 269, 0x04 }, { 299, 0x14 }, { 329, 0x05 }, { 359, 0x15 },
64 { 399, 0x25 }, { 449, 0x06 }, { 499, 0x16 }, { 549, 0x07 },
65 { 599, 0x17 }, { 649, 0x08 }, { 699, 0x18 }, { 749, 0x09 },
66 { 799, 0x19 }, { 849, 0x29 }, { 899, 0x39 }, { 949, 0x0a },
67 { 999, 0x1a }, { 1049, 0x2a }, { 1099, 0x3a }, { 1149, 0x0b },
68 { 1199, 0x1b }, { 1249, 0x2b }, { 1299, 0x3b }, { 1349, 0x0c },
69 { 1399, 0x1c }, { 1449, 0x2c }, { 1500, 0x3c }
70 };
71
72 static const char * const rk3399_mipidphy_clks[] = {
73 "dphy-ref",
74 "dphy-cfg",
75 "grf",
76 };
77
78 enum dphy_reg_id {
79 GRF_DPHY_RX0_TURNDISABLE = 0,
80 GRF_DPHY_RX0_FORCERXMODE,
81 GRF_DPHY_RX0_FORCETXSTOPMODE,
82 GRF_DPHY_RX0_ENABLE,
83 GRF_DPHY_RX0_TESTCLR,
84 GRF_DPHY_RX0_TESTCLK,
85 GRF_DPHY_RX0_TESTEN,
86 GRF_DPHY_RX0_TESTDIN,
87 GRF_DPHY_RX0_TURNREQUEST,
88 GRF_DPHY_RX0_TESTDOUT,
89 GRF_DPHY_TX0_TURNDISABLE,
90 GRF_DPHY_TX0_FORCERXMODE,
91 GRF_DPHY_TX0_FORCETXSTOPMODE,
92 GRF_DPHY_TX0_TURNREQUEST,
93 GRF_DPHY_TX1RX1_TURNDISABLE,
94 GRF_DPHY_TX1RX1_FORCERXMODE,
95 GRF_DPHY_TX1RX1_FORCETXSTOPMODE,
96 GRF_DPHY_TX1RX1_ENABLE,
97 GRF_DPHY_TX1RX1_MASTERSLAVEZ,
98 GRF_DPHY_TX1RX1_BASEDIR,
99 GRF_DPHY_TX1RX1_ENABLECLK,
100 GRF_DPHY_TX1RX1_TURNREQUEST,
101 GRF_DPHY_RX1_SRC_SEL,
102 /* rk3288 only */
103 GRF_CON_DISABLE_ISP,
104 GRF_CON_ISP_DPHY_SEL,
105 GRF_DSI_CSI_TESTBUS_SEL,
106 GRF_DVP_V18SEL,
107 /* below is for rk3399 only */
108 GRF_DPHY_RX0_CLK_INV_SEL,
109 GRF_DPHY_RX1_CLK_INV_SEL,
110 };
111
112 struct dphy_reg {
113 u16 offset;
114 u8 mask;
115 u8 shift;
116 };
117
118 #define PHY_REG(_offset, _width, _shift) \
119 { .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }
120
121 static const struct dphy_reg rk3399_grf_dphy_regs[] = {
122 [GRF_DPHY_RX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON9, 4, 0),
123 [GRF_DPHY_RX0_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 10),
124 [GRF_DPHY_RX1_CLK_INV_SEL] = PHY_REG(RK3399_GRF_SOC_CON9, 1, 11),
125 [GRF_DPHY_RX0_ENABLE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 0),
126 [GRF_DPHY_RX0_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 4),
127 [GRF_DPHY_RX0_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 8),
128 [GRF_DPHY_RX0_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON21, 4, 12),
129 [GRF_DPHY_TX0_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 0),
130 [GRF_DPHY_TX0_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 4),
131 [GRF_DPHY_TX0_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 8),
132 [GRF_DPHY_TX0_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON22, 4, 12),
133 [GRF_DPHY_TX1RX1_ENABLE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 0),
134 [GRF_DPHY_TX1RX1_FORCERXMODE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 4),
135 [GRF_DPHY_TX1RX1_FORCETXSTOPMODE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 8),
136 [GRF_DPHY_TX1RX1_TURNDISABLE] = PHY_REG(RK3399_GRF_SOC_CON23, 4, 12),
137 [GRF_DPHY_TX1RX1_TURNREQUEST] = PHY_REG(RK3399_GRF_SOC_CON24, 4, 0),
138 [GRF_DPHY_RX1_SRC_SEL] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 4),
139 [GRF_DPHY_TX1RX1_BASEDIR] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 5),
140 [GRF_DPHY_TX1RX1_ENABLECLK] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 6),
141 [GRF_DPHY_TX1RX1_MASTERSLAVEZ] = PHY_REG(RK3399_GRF_SOC_CON24, 1, 7),
142 [GRF_DPHY_RX0_TESTDIN] = PHY_REG(RK3399_GRF_SOC_CON25, 8, 0),
143 [GRF_DPHY_RX0_TESTEN] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 8),
144 [GRF_DPHY_RX0_TESTCLK] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 9),
145 [GRF_DPHY_RX0_TESTCLR] = PHY_REG(RK3399_GRF_SOC_CON25, 1, 10),
146 [GRF_DPHY_RX0_TESTDOUT] = PHY_REG(RK3399_GRF_SOC_STATUS1, 8, 0),
147 };
148
149 struct dphy_drv_data {
150 const char * const *clks;
151 unsigned int num_clks;
152 const struct hsfreq_range *hsfreq_ranges;
153 unsigned int num_hsfreq_ranges;
154 const struct dphy_reg *regs;
155 };
156
157 struct rockchip_dphy {
158 struct device *dev;
159 struct regmap *grf;
160 struct clk_bulk_data clks[MAX_DPHY_CLK];
161
162 const struct dphy_drv_data *drv_data;
163 struct phy_configure_opts_mipi_dphy config;
164 };
165
166 static inline void rk_dphy_write_grf(struct rockchip_dphy *priv,
167 unsigned int index, u8 value)
168 {
169 const struct dphy_reg *reg = &priv->drv_data->regs[index];
170 /* Update high word */
171 unsigned int val = (value << reg->shift) |
172 (reg->mask << (reg->shift + 16));
173
174 WARN_ON(!reg->offset);
175 regmap_write(priv->grf, reg->offset, val);
176 }
177
178 static void rk_dphy_write_rx(struct rockchip_dphy *priv,
179 u8 test_code, u8 test_data)
180 {
181 /*
182 * With the falling edge on TESTCLK, the TESTDIN[7:0] signal content
183 * is latched internally as the current test code. Test data is
184 * programmed internally by rising edge on TESTCLK.
185 */
186 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLK, 1);
187 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTDIN, test_code);
188 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTEN, 1);
189 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLK, 0);
190 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTEN, 0);
191 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTDIN, test_data);
192 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLK, 1);
193 }
194
195 static void rk_dphy_rx_stream_on(struct rockchip_dphy *priv)
196 {
197 const struct dphy_drv_data *drv_data = priv->drv_data;
198 struct phy_configure_opts_mipi_dphy *config = &priv->config;
199 unsigned int i, hsfreq = 0, data_rate_mbps = config->hs_clk_rate;
200
> 201 do_div(data_rate_mbps, 1000 * 1000);
202
203 dev_dbg(priv->dev, "%s: lanes %d - data_rate_mbps %u\n",
204 __func__, config->lanes, data_rate_mbps);
205
206 for (i = 0; i < drv_data->num_hsfreq_ranges; i++) {
207 if (drv_data->hsfreq_ranges[i].range_h >= data_rate_mbps) {
208 hsfreq = drv_data->hsfreq_ranges[i].cfg_bit;
209 break;
210 }
211 }
212
213 rk_dphy_write_grf(priv, GRF_DPHY_RX0_FORCERXMODE, 0);
214 rk_dphy_write_grf(priv, GRF_DPHY_RX0_FORCETXSTOPMODE, 0);
215
216 /* Disable lane turn around, which is ignored in receive mode */
217 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TURNREQUEST, 0);
218 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TURNDISABLE, 0xf);
219
220 rk_dphy_write_grf(priv, GRF_DPHY_RX0_ENABLE, GENMASK(config->lanes - 1, 0));
221
222 /* dphy start */
223 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLK, 1);
224 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLR, 1);
225 usleep_range(100, 150);
226 rk_dphy_write_grf(priv, GRF_DPHY_RX0_TESTCLR, 0);
227 usleep_range(100, 150);
228
229 /* set clock lane */
230 /* HS hsfreq_range & lane 0 settle bypass */
231 rk_dphy_write_rx(priv, CLOCK_LANE_HS_RX_CONTROL, 0);
232 /* HS RX Control of lane0 */
233 rk_dphy_write_rx(priv, LANE0_HS_RX_CONTROL, hsfreq << 1);
234 /* HS RX Control of lane1 */
235 rk_dphy_write_rx(priv, LANE1_HS_RX_CONTROL, hsfreq << 1);
236 /* HS RX Control of lane2 */
237 rk_dphy_write_rx(priv, LANE2_HS_RX_CONTROL, hsfreq << 1);
238 /* HS RX Control of lane3 */
239 rk_dphy_write_rx(priv, LANE3_HS_RX_CONTROL, hsfreq << 1);
240 /* HS RX Data Lanes Settle State Time Control */
241 rk_dphy_write_rx(priv, HS_RX_DATA_LANES_THS_SETTLE_CONTROL,
242 THS_SETTLE_COUNTER_THRESHOLD);
243
244 /* Normal operation */
245 rk_dphy_write_rx(priv, 0x0, 0);
246 }
247
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
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^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2019-11-08 20:28 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-06 12:01 [PATCH v9 0/4] Rockchip ISP Driver Helen Koike
2019-11-06 12:01 ` [PATCH v9 1/4] media: videodev2.h, v4l2-ioctl: add rkisp1 meta buffer format Helen Koike
2019-11-06 12:22 ` Hans Verkuil (hansverk)
2019-11-06 12:30 ` Helen Koike
2019-11-06 13:44 ` Ezequiel Garcia
2019-11-06 13:49 ` Hans Verkuil (hansverk)
2019-11-06 23:26 ` Helen Koike
2019-11-07 3:08 ` Tomasz Figa
2019-11-06 12:01 ` [PATCH v9 2/4] media: staging: phy-rockchip-dphy: add Rockchip MIPI Synopsys DPHY driver Helen Koike
2019-11-08 20:28 ` kbuild test robot
2019-11-06 12:01 ` [PATCH v9 4/4] MAINTAINERS: add entry for Rockchip ISP1 driver Helen Koike
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