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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=C1hxUVhPxMAJ8iC1Jpoywv+GpiOlXAEZ3JQKKj0idbA=; b=RIY1vumCmOGC1BPmli6yy76umgTV8Pjm+58GkXvn1wwn2unxC71BBf67bTplScMSeW heyZuRwru5BWbhrKIBzxexuBfE+N/Yt6yUamD/19vQse5OQhlm7QRlGCgZJGD0v9EzPO PoZ167EcT1/FXkPkaZBO2P/imZdcsA2Aw06eerN3B7QxwWRxcdRLRg2Z1ylA+GqJPSLQ T0MOo+iBjU8sCzjVYeAYUhy496bzqzZ5JrQTsQKQ7dJ0jaX/aw1UTeEAkkdUYvN6LOqL CfmuWDAkPUCkCl7SjZzS44A89GENaOee6mu2IjivG7WwPziZX5hM5so59ctAItK1+tUf i1wA== X-Gm-Message-State: APjAAAU3Sif7o906RJ8l+J86GH0UbKkvbeKLZGoyooPg9OQlbb/2065I 6qINUDoRhu/XrZP/9QgIXTbow9jP2B0kD/taLZ8= X-Google-Smtp-Source: APXvYqyFWsOl+fg45q4H1f0m++1DSGjcTD7K0R/xRLC2C+yf1/Hj6drnDfWHx1wFtrD6k+/4rGRwk4rOL83I4swr8f0= X-Received: by 2002:a5d:8c81:: with SMTP id g1mr4054068ion.239.1561414877512; Mon, 24 Jun 2019 15:21:17 -0700 (PDT) MIME-Version: 1.0 References: <20190604170146.12205-1-s-anna@ti.com> <47b8f278-85ff-18be-d5a0-fde9de6e17f2@ti.com> In-Reply-To: <47b8f278-85ff-18be-d5a0-fde9de6e17f2@ti.com> From: Jassi Brar Date: Mon, 24 Jun 2019 17:21:06 -0500 Message-ID: Subject: Re: [PATCH 0/2] Add Mailbox support for TI K3 SoCs To: Suman Anna X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190624_152118_694503_9301DBE8 X-CRM114-Status: GOOD ( 18.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Devicetree List , linux-omap , Rob Herring , Linux Kernel Mailing List , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jun 24, 2019 at 3:39 PM Suman Anna wrote: > > Hi Jassi, > > On 6/4/19 12:01 PM, Suman Anna wrote: > > Hi Jassi, > > > > The following series adds the support for the Mailbox IP present > > within the Main NavSS module on the newer TI K3 AM65x and J721E SoCs. > > > > The Mailbox IP is similar to the previous generation IP on OMAP SoCs > > with a few differences: > > - Multiple IP instances from previous DRA7/AM57 family each form a > > cluster and are part of the same IP. The driver support will continue > > to be based on a cluster. > > - The IP is present within a Main NaVSS, and interrupts have to go > > through an Interrupt Router within Main NavSS before they reach the > > respective processor sub-system's interrupt controllers. > > - The register layout is mostly same, with difference in two registers > > > > Support is added by enhancing the existing OMAP Mailbox driver to > > support the K3 IP using a new compatible. The driver also has to be > > adjusted to deal with the 32-bit mailbox payloads vs the 64-bit > > pointers used by the Mailbox API on these Arm v8 platforms. > > > > DT nodes will be posted separately once the binding is acked. > > Can you please pick this series up for 5.3 merge window if you do not > have any comments. > I will. Usually I leave the code to cook in the open for as long as possible, more so when no acks are coming. Cheers! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel