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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=kDFY+QTqqiMEOnTov2xDeNaIk7HwyPkPWyRkRRHSyzk=; b=Q1DjIfku1QAIFFGCF5Z3AMZ/e+R9Ui2tIfLv7FHWrtK0VRoIpRVId3cp9661PcPHsv 9D1BXciPUeop0VinXOhymw46k7d79jpUHosgethIZDxKIGFfd9mW0Mrj6YCQxfh/qyd2 IXwo/MbwS5rV0mo1h9uqqdMbebNx1dGjJkLot1lSljfWnVrLUESuAxS86kH959vLxCJI 1j3pdGb7gNImoxth0J3py+DVMmiGb2PMWttTvqjxRE0iPus2GZ6mNxC4JouVhGzUbewU y5i1ouBh03x48vWTUO9yPRZS9AywZR4MgNrkvBk26F7THYGq7hMmraJtuyjdpYKkf2dt E4UA== X-Gm-Message-State: APjAAAWjVu+cqPrmXQzu/Qbafi7MkKSFM2R+pR7NdNcC/HxWaPBZDf/h FBTZbphfU6NiDnToG/7tYAl74qwyuf+XuWthxjIl+A== X-Google-Smtp-Source: APXvYqxJtx+kv4xSwtZ2Oh9SZIkuBtLHG+NnPvuNmG5fGRPD0rBSI3dyCsgfek9QsPqek/vYbO/dzGax8Uzv7n1exuo= X-Received: by 2002:a19:dc0d:: with SMTP id t13mr52002001lfg.152.1561465872654; Tue, 25 Jun 2019 05:31:12 -0700 (PDT) MIME-Version: 1.0 References: <20190618160105.26343-1-alpawi@amazon.com> In-Reply-To: <20190618160105.26343-1-alpawi@amazon.com> From: Linus Walleij Date: Tue, 25 Jun 2019 14:31:00 +0200 Message-ID: Subject: Re: [PATCH 0/2] pinctl: armada-37xx: fix for pins 32+ To: alpawi@amazon.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190625_053114_627302_37ED0349 X-CRM114-Status: GOOD ( 11.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Benjamin Herrenschmidt , Jason Cooper , Andrew Lunn , Gregory Clement , "linux-kernel@vger.kernel.org" , "open list:GPIO SUBSYSTEM" , Linux ARM , Sebastian Hesselbarth Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 18, 2019 at 6:01 PM wrote: > From: Patrick Williams > > The 37xx GPIO config registers are only 32 bits long and > span 2 registers for the NB GPIO controller. The function > to calculate the offset was missing the increase to the > config register. > > I have tested both raw gpio access and interrupts using > libgpiod utilities on an Espressonbin. > > The first patch is a simple rename of a function because > the original name implied it was doing IO itself ("update > reg"). This patch could be dropped if undesired. > > The second patch contains the fix for GPIOs 32+. This looks good overall. I am waiting for a maintainer review. If nothing happens in a week, poke me and I'll just apply the patches. Yours, Linus Walleij _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel