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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=xhEeNJG6Xe03fAdCWoX8L2PNC8Ts9rcXxVowinyH7Jk=; b=Pg6p0S9F3FXje2+au3eGYgr05CU+jJRMdWbPn9zNLKkbwOp+7q043dr4OoD6aGfzYp AhZ3G4Ef3+9y5kbmRoPdgr0k6LnTO37pBwjGVMRQOTgjsHBLCBMyUaupgZ2ri27GXbVe +UWSMiYktENBTHrdacZiYoQNmoW4zqqMjmQXc0CvkTPGlOcoep/kR7YJBG+JbeOg84qu LNEDufhWsdtJfuBRjbafEjMtCRUMiKG01I0fJd8BrF1qG4B4/1LERFrynub0ivji0Hwh eT3us1y4Mm2vxaFK9+z2/9n8peiS2UhYyazpUmNq4j0pdrkdWnhgE2bQrp9SEB78EMjO mF+w== X-Gm-Message-State: APjAAAWEFpBpfFDfuBxrS1epmLk9Yb4YdTG0gz0Sj+X6mktQ9uydWDMH 7MbEaJf3ePW+qp064YgwLaNTsWWVH2BRMkeNmj0= X-Google-Smtp-Source: APXvYqyjnAk8oubKYhxKxWzUPog0rE1nkqWdTWkbrvxjIY8nWbYmSn4gzUFbwFiw03cl5ZtTyqcd01lYsxkaQM35M+Q= X-Received: by 2002:a05:6402:2037:: with SMTP id ay23mr10507644edb.146.1579384632180; Sat, 18 Jan 2020 13:57:12 -0800 (PST) MIME-Version: 1.0 References: <20200116080440.118679-1-jian.hu@amlogic.com> <20200116080440.118679-3-jian.hu@amlogic.com> In-Reply-To: <20200116080440.118679-3-jian.hu@amlogic.com> From: Martin Blumenstingl Date: Sat, 18 Jan 2020 22:57:01 +0100 Message-ID: Subject: Re: [PATCH v6 2/5] clk: meson: add support for A1 PLL clock ops To: Jian Hu X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200118_135717_594022_B36E91ED X-CRM114-Status: GOOD ( 12.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Victor Wan , Jianxin Pan , Neil Armstrong , Stephen Boyd , Kevin Hilman , Michael Turquette , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Qiufang Dai , Chandle Zou , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jerome Brunet Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Jian, thank you for the update! On Thu, Jan 16, 2020 at 9:04 AM Jian Hu wrote: > > Compared with the previous SoCs, self-adaption current module > is newly added for A1, and there is no reset parm except the > fixed pll. In A1 PLL, the PLL enable sequence is different, using > the new power-on sequence to enable the PLL. > > Signed-off-by: Jian Hu Acked-by: Martin Blumenstingl [...] > @@ -323,13 +330,34 @@ static int meson_clk_pll_enable(struct clk_hw *hw) > return 0; > > /* Make sure the pll is in reset */ > - meson_parm_write(clk->map, &pll->rst, 1); > + if (MESON_PARM_APPLICABLE(&pll->rst)) > + meson_parm_write(clk->map, &pll->rst, 1); > > /* Enable the pll */ > meson_parm_write(clk->map, &pll->en, 1); > > /* Take the pll out reset */ > - meson_parm_write(clk->map, &pll->rst, 0); > + if (MESON_PARM_APPLICABLE(&pll->rst)) > + meson_parm_write(clk->map, &pll->rst, 0); > + > + /* > + * Compared with the previous SoCs, self-adaption current module > + * is newly added for A1, keep the new power-on sequence to enable the > + * PLL. The sequence is: > + * 1. enable the pll, delay for 10us > + * 2. enable the pll self-adaption current module, delay for 40us > + * 3. enable the lock detect module > + */ > + if (MESON_PARM_APPLICABLE(&pll->current_en)) { > + udelay(10); > + meson_parm_write(clk->map, &pll->current_en, 1); > + udelay(40); note to myself: first I thought that these have to be converted to ulseep_range BUT: clk_enable can be called from atomic context, so the atomic versions (udelay instead of usleep/usleep_range) are perfectly fine in Jian's patch Martin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel