[PATCH 0/5] usb: dwc-meson-g12a: Add support for USB on S400 board

[PATCH 0/5] usb: dwc-meson-g12a: Add support for USB on S400 board

[Neil Armstrong]

The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.

It needs the same init sequence as GXL & GXM, but it seems it doesn't need
the host disconnect bit.

The Glue driver reuses the already implemented GXL & GXM work.

The USB2 PHY driver needs a slight tweak to keep the OTG detection working.

Neil Armstrong (5):
  phy: amlogic: phy-meson-gxl-usb2: keep ID pull-up even in Host mode
  dt-bindings: usb: amlogic,meson-g12a-usb-ctrl: add the Amlogic AXG
    Families USB Glue Bindings
  usb: dwc-meson-g12a: Add support for USB on AXG SoCs
  arm64: dts: meson-axg: add USB nodes
  arm64: dts: meson-axg-s400: enable USB OTG

 .../usb/amlogic,meson-g12a-usb-ctrl.yaml      | 22 +++++++-
 .../arm64/boot/dts/amlogic/meson-axg-s400.dts | 10 ++++
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi    | 51 +++++++++++++++++++
 drivers/phy/amlogic/phy-meson-gxl-usb2.c      |  3 +-
 drivers/usb/dwc3/dwc3-meson-g12a.c            | 17 +++++++
 5 files changed, 101 insertions(+), 2 deletions(-)

-- 
2.22.0


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[PATCH 1/5] phy: amlogic: phy-meson-gxl-usb2: keep ID pull-up even in Host mode

[Neil Armstrong]

In order to keep OTG ID detection even when in Host mode, the ID line of
the PHY (if the current phy is an OTG one) pull-up should be kept
enable in both modes.

This fixes OTG switch on GXL, GXM & AXG platforms, otherwise once switched
to Host, the ID detection doesn't work anymore to switch back to Device.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/phy/amlogic/phy-meson-gxl-usb2.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb2.c b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
index 43ec9bf24abf..6e862ea60d8f 100644
--- a/drivers/phy/amlogic/phy-meson-gxl-usb2.c
+++ b/drivers/phy/amlogic/phy-meson-gxl-usb2.c
@@ -158,7 +158,8 @@ static int phy_meson_gxl_usb2_set_mode(struct phy *phy,
 				   U2P_R0_DM_PULLDOWN);
 		regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_DP_PULLDOWN,
 				   U2P_R0_DP_PULLDOWN);
-		regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_ID_PULLUP, 0);
+		regmap_update_bits(priv->regmap, U2P_R0, U2P_R0_ID_PULLUP,
+				   U2P_R0_ID_PULLUP);
 		break;
 
 	case PHY_MODE_USB_DEVICE:
-- 
2.22.0


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[PATCH 2/5] dt-bindings: usb: amlogic, meson-g12a-usb-ctrl: add the Amlogic AXG Families USB Glue Bindings

[Neil Armstrong]

The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 .../usb/amlogic,meson-g12a-usb-ctrl.yaml      | 22 ++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
index 5b04a7dfa018..c0058332b967 100644
--- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
+++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
@@ -25,13 +25,14 @@ description: |
   The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in
   host-only mode.
 
-  The Amlogic GXL & GXM SoCs doesn't embed an USB3 PHY.
+  The Amlogic GXL, GXM & AXG SoCs doesn't embed an USB3 PHY.
 
 properties:
   compatible:
     enum:
       - amlogic,meson-gxl-usb-ctrl
       - amlogic,meson-gxm-usb-ctrl
+      - amlogic,meson-axg-usb-ctrl
       - amlogic,meson-g12a-usb-ctrl
       - amlogic,meson-a1-usb-ctrl
 
@@ -151,6 +152,25 @@ allOf:
 
       required:
         - clock-names
+  - if:
+      properties:
+        compatible:
+          enum:
+            - amlogic,meson-axg-usb-ctrl
+
+    then:
+      properties:
+        phy-names:
+          items:
+            - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
+        clocks:
+          minItems: 2
+        clock-names:
+          items:
+            - const: usb_ctrl
+            - const: ddr
+      required:
+        - clock-names
   - if:
       properties:
         compatible:
-- 
2.22.0


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[PATCH 3/5] usb: dwc-meson-g12a: Add support for USB on AXG SoCs

[Neil Armstrong]

The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.

It needs the same init sequence as GXL & GXM, but it seems it doesn't need
the host disconnect bit.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/usb/dwc3/dwc3-meson-g12a.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index 1f7f4d88ed9d..90275c13c224 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -215,6 +215,19 @@ static struct dwc3_meson_g12a_drvdata gxm_drvdata = {
 	.usb_post_init = dwc3_meson_gxl_usb_post_init,
 };
 
+static struct dwc3_meson_g12a_drvdata axg_drvdata = {
+	.otg_switch_supported = true,
+	.clks = meson_gxl_clocks,
+	.num_clks = ARRAY_SIZE(meson_gxl_clocks),
+	.phy_names = meson_a1_phy_names,
+	.num_phys = ARRAY_SIZE(meson_a1_phy_names),
+	.setup_regmaps = dwc3_meson_gxl_setup_regmaps,
+	.usb2_init_phy = dwc3_meson_gxl_usb2_init_phy,
+	.set_phy_mode = dwc3_meson_gxl_set_phy_mode,
+	.usb_init = dwc3_meson_g12a_usb_init,
+	.usb_post_init = dwc3_meson_gxl_usb_post_init,
+};
+
 static struct dwc3_meson_g12a_drvdata g12a_drvdata = {
 	.otg_switch_supported = true,
 	.clks = meson_g12a_clocks,
@@ -930,6 +943,10 @@ static const struct of_device_id dwc3_meson_g12a_match[] = {
 		.compatible = "amlogic,meson-gxm-usb-ctrl",
 		.data = &gxm_drvdata,
 	},
+	{
+		.compatible = "amlogic,meson-axg-usb-ctrl",
+		.data = &axg_drvdata,
+	},
 	{
 		.compatible = "amlogic,meson-g12a-usb-ctrl",
 		.data = &g12a_drvdata,
-- 
2.22.0


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[PATCH 4/5] arm64: dts: meson-axg: add USB nodes

[Neil Armstrong]

This adds the USB Glue node, with the USB2 & USB3 controllers along the single
USB2 PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 9ae6db16b8e6..0b68a383b60f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -171,6 +171,46 @@
 		#size-cells = <2>;
 		ranges;
 
+		usb: usb@ffe09080 {
+			compatible = "amlogic,meson-axg-usb-ctrl";
+			reg = <0x0 0xffe09080 0x0 0x20>;
+			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+
+			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
+			clock-names = "usb_ctrl", "ddr";
+			resets = <&reset RESET_USB_OTG>;
+
+			dr_mode = "otg";
+
+			phys = <&usb2_phy1>;
+			phy-names = "usb2-phy1";
+
+			dwc2: usb@ff400000 {
+				compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
+				reg = <0x0 0xff400000 0x0 0x40000>;
+				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clkc CLKID_USB1>;
+				clock-names = "otg";
+				phys = <&usb2_phy1>;
+				dr_mode = "peripheral";
+				g-rx-fifo-size = <192>;
+				g-np-tx-fifo-size = <128>;
+				g-tx-fifo-size = <128 128 16 16 16>;
+			};
+
+			dwc3: usb@ff500000 {
+				compatible = "snps,dwc3";
+				reg = <0x0 0xff500000 0x0 0x100000>;
+				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+				dr_mode = "host";
+				maximum-speed = "high-speed";
+				snps,dis_u2_susphy_quirk;
+			};
+		};
+
 		ethmac: ethernet@ff3f0000 {
 			compatible = "amlogic,meson-axg-dwmac",
 				     "snps,dwmac-3.70a",
@@ -1734,6 +1774,17 @@
 				clock-names = "core", "clkin0", "clkin1";
 				resets = <&reset RESET_SD_EMMC_C>;
 			};
+
+			usb2_phy1: phy@9020 {
+				compatible = "amlogic,meson-gxl-usb2-phy";
+				#phy-cells = <0>;
+				reg = <0x0 0x9020 0x0 0x20>;
+				clocks = <&clkc CLKID_USB>;
+				clock-names = "phy";
+				resets = <&reset RESET_USB_OTG>;
+				reset-names = "phy";
+				status = "okay";
+			};
 		};
 
 		sram: sram@fffc0000 {
-- 
2.22.0


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[PATCH 5/5] arm64: dts: meson-axg-s400: enable USB OTG

[Neil Armstrong]

This enables USB OTG on the S400 board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index cb1360ae1211..5f131debcbad 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
@@ -584,3 +584,13 @@
 	pinctrl-0 = <&uart_ao_a_pins>;
 	pinctrl-names = "default";
 };
+
+&usb {
+	status = "okay";
+	dr_mode = "otg";
+	vbus-supply = <&usb_pwr>;
+};
+
+&usb2_phy1 {
+	phy-supply = <&vcc_5v>;
+};
-- 
2.22.0


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Re: [PATCH 0/5] usb: dwc-meson-g12a: Add support for USB on S400 board

[Kevin Hilman]

Neil Armstrong <narmstrong@baylibre.com> writes:

> The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.

minor grammar nit: s/close from/close to/  (also in patches 2 & 3).
Otherwise..

Reviewed-by: Kevin Hilman <khilman@baylibre.com>

Kevin



> It needs the same init sequence as GXL & GXM, but it seems it doesn't need
> the host disconnect bit.
>
> The Glue driver reuses the already implemented GXL & GXM work.
>
> The USB2 PHY driver needs a slight tweak to keep the OTG detection working.
>
> Neil Armstrong (5):
>   phy: amlogic: phy-meson-gxl-usb2: keep ID pull-up even in Host mode
>   dt-bindings: usb: amlogic,meson-g12a-usb-ctrl: add the Amlogic AXG
>     Families USB Glue Bindings
>   usb: dwc-meson-g12a: Add support for USB on AXG SoCs
>   arm64: dts: meson-axg: add USB nodes
>   arm64: dts: meson-axg-s400: enable USB OTG
>
>  .../usb/amlogic,meson-g12a-usb-ctrl.yaml      | 22 +++++++-
>  .../arm64/boot/dts/amlogic/meson-axg-s400.dts | 10 ++++
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi    | 51 +++++++++++++++++++
>  drivers/phy/amlogic/phy-meson-gxl-usb2.c      |  3 +-
>  drivers/usb/dwc3/dwc3-meson-g12a.c            | 17 +++++++
>  5 files changed, 101 insertions(+), 2 deletions(-)
>
> -- 
> 2.22.0

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Re: [PATCH 2/5] dt-bindings: usb: amlogic, meson-g12a-usb-ctrl: add the Amlogic AXG Families USB Glue Bindings

[Rob Herring]

On Wed, 09 Sep 2020 18:04:06 +0200, Neil Armstrong wrote:
> The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  .../usb/amlogic,meson-g12a-usb-ctrl.yaml      | 22 ++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

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Re: [PATCH 1/5] phy: amlogic: phy-meson-gxl-usb2: keep ID pull-up even in Host mode

[Martin Blumenstingl]

On Wed, Sep 9, 2020 at 6:04 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> In order to keep OTG ID detection even when in Host mode, the ID line of
> the PHY (if the current phy is an OTG one) pull-up should be kept
> enable in both modes.
>
> This fixes OTG switch on GXL, GXM & AXG platforms, otherwise once switched
> to Host, the ID detection doesn't work anymore to switch back to Device.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

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Re: [PATCH 2/5] dt-bindings: usb: amlogic,meson-g12a-usb-ctrl: add the Amlogic AXG Families USB Glue Bindings

[Martin Blumenstingl]

Hi Neil

On Wed, Sep 9, 2020 at 6:04 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.
nit-pick: I think this should be "close to"

> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

> ---
>  .../usb/amlogic,meson-g12a-usb-ctrl.yaml      | 22 ++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
> index 5b04a7dfa018..c0058332b967 100644
> --- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
> +++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
> @@ -25,13 +25,14 @@ description: |
>    The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in
>    host-only mode.
>
> -  The Amlogic GXL & GXM SoCs doesn't embed an USB3 PHY.
> +  The Amlogic GXL, GXM & AXG SoCs doesn't embed an USB3 PHY.
nit-pick: not sure if we need to fix it here: s/doesn't/don't/
(personally I would also put AXG first - in reality it changes nothing though)


Best regards,
Martin

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Re: [PATCH 3/5] usb: dwc-meson-g12a: Add support for USB on AXG SoCs

[Martin Blumenstingl]

Hi Neil,

On Wed, Sep 9, 2020 at 6:04 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.
s/close from/close to/

[...]
> +static struct dwc3_meson_g12a_drvdata axg_drvdata = {
> +       .otg_switch_supported = true,
> +       .clks = meson_gxl_clocks,
> +       .num_clks = ARRAY_SIZE(meson_gxl_clocks),
> +       .phy_names = meson_a1_phy_names,
> +       .num_phys = ARRAY_SIZE(meson_a1_phy_names),
I wonder if we should also update the comment for meson_a1_phy_names
to understand that part I had to go back to the dt-bindings patch


Best regards,
Martin

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Re: [PATCH 4/5] arm64: dts: meson-axg: add USB nodes

[Martin Blumenstingl]

Hi Neil,

On Wed, Sep 9, 2020 at 6:05 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> This adds the USB Glue node, with the USB2 & USB3 controllers along the single
> USB2 PHY node.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

[...]
> +                       usb2_phy1: phy@9020 {
> +                               compatible = "amlogic,meson-gxl-usb2-phy";
> +                               #phy-cells = <0>;
> +                               reg = <0x0 0x9020 0x0 0x20>;
> +                               clocks = <&clkc CLKID_USB>;
> +                               clock-names = "phy";
> +                               resets = <&reset RESET_USB_OTG>;
> +                               reset-names = "phy";
> +                               status = "okay";
if you have to re-send this for some reason: status = "okay" is the
default and so I think we can omit this

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Re: [PATCH 5/5] arm64: dts: meson-axg-s400: enable USB OTG

[Martin Blumenstingl]

Hi Neil,

On Wed, Sep 9, 2020 at 6:05 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
[...]
> +&usb {
> +       status = "okay";
> +       dr_mode = "otg";
> +       vbus-supply = <&usb_pwr>;
> +};
> +
> +&usb2_phy1 {
> +       phy-supply = <&vcc_5v>;
out of curiosity: why do we need this phy-supply here?
isn't the usb_pwr regulator as vbus-supply above enough?


Best regards,
Martin

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Re: [PATCH 5/5] arm64: dts: meson-axg-s400: enable USB OTG

[Neil Armstrong]

On 15/09/2020 22:05, Martin Blumenstingl wrote:
> Hi Neil,
> 
> On Wed, Sep 9, 2020 at 6:05 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
> [...]
>> +&usb {
>> +       status = "okay";
>> +       dr_mode = "otg";
>> +       vbus-supply = <&usb_pwr>;
>> +};
>> +
>> +&usb2_phy1 {
>> +       phy-supply = <&vcc_5v>;
> out of curiosity: why do we need this phy-supply here?
> isn't the usb_pwr regulator as vbus-supply above enough?

Damn you're right !
Thanks for noticing.

Neil

> 
> 
> Best regards,
> Martin
> 


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Re: [PATCH 4/5] arm64: dts: meson-axg: add USB nodes

[Neil Armstrong]

On 15/09/2020 22:04, Martin Blumenstingl wrote:
> Hi Neil,
> 
> On Wed, Sep 9, 2020 at 6:05 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>>
>> This adds the USB Glue node, with the USB2 & USB3 controllers along the single
>> USB2 PHY node.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> 
> [...]
>> +                       usb2_phy1: phy@9020 {
>> +                               compatible = "amlogic,meson-gxl-usb2-phy";
>> +                               #phy-cells = <0>;
>> +                               reg = <0x0 0x9020 0x0 0x20>;
>> +                               clocks = <&clkc CLKID_USB>;
>> +                               clock-names = "phy";
>> +                               resets = <&reset RESET_USB_OTG>;
>> +                               reset-names = "phy";
>> +                               status = "okay";
> if you have to re-send this for some reason: status = "okay" is the
> default and so I think we can omit this
> 
Ok, will removed in v2

Thanks,
Neil

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Re: [PATCH 3/5] usb: dwc-meson-g12a: Add support for USB on AXG SoCs

[Neil Armstrong]

On 15/09/2020 21:59, Martin Blumenstingl wrote:
> Hi Neil,
> 
> On Wed, Sep 9, 2020 at 6:04 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>>
>> The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.
> s/close from/close to/
> 
> [...]
>> +static struct dwc3_meson_g12a_drvdata axg_drvdata = {
>> +       .otg_switch_supported = true,
>> +       .clks = meson_gxl_clocks,
>> +       .num_clks = ARRAY_SIZE(meson_gxl_clocks),
>> +       .phy_names = meson_a1_phy_names,
>> +       .num_phys = ARRAY_SIZE(meson_a1_phy_names),
> I wonder if we should also update the comment for meson_a1_phy_names
> to understand that part I had to go back to the dt-bindings patch
Sure,

Thanks,
Neil

> 
> 
> Best regards,
> Martin
> 


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