From: Enric Balletbo Serra <eballetbo@gmail.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Toan Le <toan@os.amperecomputing.com>,
Will Deacon <will@kernel.org>, Rob Herring <robh@kernel.org>,
Ryder Lee <ryder.lee@mediatek.com>,
Michal Simek <michal.simek@xilinx.com>,
Christoph Hellwig <hch@infradead.org>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip@lists.infradead.org>,
bcm-kernel-feedback-list@broadcom.com,
Linus Walleij <linus.walleij@linaro.org>,
Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
Simon Horman <horms@verge.net.au>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
Ley Foon Tan <lftan@altera.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Scott Branden <sbranden@broadcom.com>,
Jingoo Han <jingoohan1@gmail.com>,
rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
Tom Joseph <tjoseph@cadence.com>,
Srinath Mannam <srinath.mannam@broadcom.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Andrew Murray <andrew.murray@arm.com>
Subject: Re: [PATCH v3 10/25] PCI: rockchip: Use pci_parse_request_of_pci_ranges()
Date: Fri, 6 Dec 2019 15:59:28 +0100 [thread overview]
Message-ID: <CAFqH_52BiQJzNEzd_0pB3K+JmzVOVikYQo0xfiC0J-DwiXdtqw@mail.gmail.com> (raw)
In-Reply-To: <20191206140901.GB26562@e121166-lin.cambridge.arm.com>
Hi Lorenzo,
Missatge de Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> del dia dv.,
6 de des. 2019 a les 15:09:
>
> On Thu, Dec 05, 2019 at 06:56:01PM +0100, Enric Balletbo Serra wrote:
> > Hi Rob,
> >
> > Missatge de Rob Herring <robh@kernel.org> del dia dl., 28 d’oct. 2019
> > a les 17:38:
> > >
> > > Convert the Rockchip host bridge to use the common
> > > pci_parse_request_of_pci_ranges().
> > >
> > > There's no need to assign the resources to a temporary list first. Just
> > > use bridge->windows directly and remove all the temporary list handling.
> > >
> > > Cc: Shawn Lin <shawn.lin@rock-chips.com>
> > > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > Cc: Andrew Murray <andrew.murray@arm.com>
> > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > Cc: Heiko Stuebner <heiko@sntech.de>
> > > Cc: linux-rockchip@lists.infradead.org
> > > Signed-off-by: Rob Herring <robh@kernel.org>
> > > ---
> >
> > I just tested mainline on my Samsung Chromebook Plus, and since
> > yesterday I'm getting a "synchronous external abort" [1]. After a
> > bisection, I found that this patch triggers the issue (this patch was
> > merged yesterday)
>
> This patch standalone triggers a compilation error - so it does
> trigger a bisection but not the one you are enquiring about.
>
Right, I didn't run a "normal" bisection and is really annoying have
commits that break the build. I manually bisected
and fixed the build myself. Maybe I did something wrong but ...
> Can you try to bisect it again and report back please ?
>
Before those patches I don't see the error:
62240a88004b0205beb0c1faca1c875c392b53f0 PCI: rockchip: Drop storing
driver private outbound resource data
5c1306a0fde67e5a39bef79932a0cb5cec5fd629 PCI: rockchip: Use
pci_parse_request_of_pci_ranges()
After those patches I see:
[ 15.362128] mwifiex_pcie 0000:01:00.0: enabling device (0000 -> 0002)
[ 15.369655] mwifiex_pcie: PCI memory map Virt0: 00000000a573ad00
PCI memory map Virt2: 00000000783126c4
[ 15.381466] Internal error: synchronous external abort: 96000210
[#1] PREEMPT SMP
[ 15.389965] Modules linked in: mwifiex_pcie(+) mwifiex uvcvideo
cfg80211 atmel_mxt_ts videobuf2_vmalloc videobuf2_memops
videobuf2_v4l2 rockchipdrm videobuf2_common v$
deodev cdc_ether usbnet analogix_dp panfrost r8152 rfkill dw_mipi_dsi
dw_hdmi cros_ec_sensors industrialio_triggered_buffer crct10dif_ce
snd_soc_rk3399_gru_sound cec mc $
ctrl_regulator kfifo_buf snd_soc_da7219 gpu_sched snd_soc_max98357a
i2c_hid snd_soc_rt5514 snd_soc_rockchip_i2s cros_ec_sensors_core
sbs_battery pcie_rockchip_host snd_s$
c_rt5514_spi cros_usbpd_charger rockchip_saradc pwm_cros_ec
cros_ec_chardev cros_usbpd_logger phy_rockchip_pcie pwm_bl
snd_soc_rl6231 rockchip_thermal snd_soc_rockchip_p$
m ip_tables x_tables ipv6 nf_defrag_ipv6
[ 15.461095] CPU: 2 PID: 269 Comm: systemd-udevd Not tainted 5.4.0+ #327
[ 15.461097] Hardware name: Google Kevin (DT)
[ 15.461101] pstate: 60000005 (nZCv daif -PAN -UAO)
[ 15.461116] pc : mwifiex_register_dev+0x264/0x3f8 [mwifiex_pcie]
[ 15.461121] lr : mwifiex_register_dev+0x150/0x3f8 [mwifiex_pcie]
[ 15.461123] sp : ffff800012073860
[ 15.461128] x29: ffff800012073860 x28: ffff8000100a2e28
[ 15.509043] x27: ffff8000118b6210 x26: ffff800008f57458
[ 15.515055] x25: ffff0000ecfda000 x24: 0000000000000001
[ 15.521069] x23: ffff0000e9905080 x22: ffff800008f5d000
[ 15.527082] x21: ffff0000eecea078 x20: ffff0000e9905080
[ 15.533096] x19: ffff0000eecea000 x18: 0000000000000001
[ 15.539108] x17: 0000000000000000 x16: 0000000000000000
[ 15.545118] x15: ffffffffffffffff x14: ffff8000118998c8
[ 15.551128] x13: ffff000000000000 x12: 0000000000000008
[ 15.557138] x11: 0101010101010101 x10: ffff7f7fffff7fff
[ 15.563148] x9 : 0000000000000000 x8 : ffff0000e3c24240
[ 15.569159] x7 : 0000000000000000 x6 : ffff0000e3c24148
[ 15.575169] x5 : ffff0000e3c24148 x4 : ffff0000e7975ec8
[ 15.581178] x3 : 0000000000000001 x2 : 0000000000002b42
[ 15.587188] x1 : ffff800012c00008 x0 : ffff0000e9905080
[ 15.593200] Call trace:
[ 15.595970] mwifiex_register_dev+0x264/0x3f8 [mwifiex_pcie]
[ 15.602398] mwifiex_add_card+0x2f8/0x430 [mwifiex]
[ 15.607920] mwifiex_pcie_probe+0x98/0x148 [mwifiex_pcie]
[ 15.614033] local_pci_probe+0x3c/0xa0
[ 15.618275] pci_device_probe+0x110/0x1a8
[ 15.622812] really_probe+0xd4/0x308
[ 15.626856] driver_probe_device+0x54/0xe8
[ 15.631491] device_driver_attach+0x6c/0x78
[ 15.636224] __driver_attach+0x54/0xd0
[ 15.640465] bus_for_each_dev+0x70/0xc0
[ 15.644804] driver_attach+0x20/0x28
[ 15.648847] bus_add_driver+0x178/0x1d8
[ 15.653186] driver_register+0x60/0x110
[ 15.657525] __pci_register_driver+0x40/0x48
[ 15.662359] mwifiex_pcie_init+0x24/0x1000 [mwifiex_pcie]
[ 15.668469] do_one_initcall+0x74/0x1a8
[ 15.672810] do_init_module+0x50/0x208
[ 15.677050] load_module+0x1a78/0x1d18
[ 15.681290] __do_sys_finit_module+0xd0/0xe8
[ 15.686120] __arm64_sys_finit_module+0x1c/0x28
[ 15.691247] el0_svc_common.constprop.2+0x88/0x150
[ 15.696668] el0_svc_handler+0x20/0x80
[ 15.700909] el0_sync_handler+0x118/0x188
[ 15.705444] el0_sync+0x140/0x180
[ 15.716955] Code: a8c67bfd d65f03c0 f942ac01 91002021 (b9400021)
[ 15.731548] ---[ end trace 1488ca6d6b162849 ]---
Thanks,
Enric
> Thanks,
> Lorenzo
>
> > I didn't look in detail yet, but if you have any idea of what could be
> > the problem, that would be great.
> >
> > Thanks,
> > Enric
> >
> > [1] https://hastebin.com/adasegihiw.rb
> >
> > > drivers/pci/controller/pcie-rockchip-host.c | 36 ++++-----------------
> > > 1 file changed, 7 insertions(+), 29 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
> > > index ef8e677ce9d1..8d2e6f2e141e 100644
> > > --- a/drivers/pci/controller/pcie-rockchip-host.c
> > > +++ b/drivers/pci/controller/pcie-rockchip-host.c
> > > @@ -950,14 +950,10 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> > > struct device *dev = &pdev->dev;
> > > struct pci_bus *bus, *child;
> > > struct pci_host_bridge *bridge;
> > > + struct resource *bus_res;
> > > struct resource_entry *win;
> > > - resource_size_t io_base;
> > > - struct resource *mem;
> > > - struct resource *io;
> > > int err;
> > >
> > > - LIST_HEAD(res);
> > > -
> > > if (!dev->of_node)
> > > return -ENODEV;
> > >
> > > @@ -995,29 +991,20 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> > > if (err < 0)
> > > goto err_deinit_port;
> > >
> > > - err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
> > > - &res, &io_base);
> > > + err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, &bus_res);
> > > if (err)
> > > goto err_remove_irq_domain;
> > >
> > > - err = devm_request_pci_bus_resources(dev, &res);
> > > - if (err)
> > > - goto err_free_res;
> > > + rockchip->root_bus_nr = bus_res->start;
> > >
> > > /* Get the I/O and memory ranges from DT */
> > > - resource_list_for_each_entry(win, &res) {
> > > + resource_list_for_each_entry(win, &bridge->windows) {
> > > switch (resource_type(win->res)) {
> > > case IORESOURCE_IO:
> > > io = win->res;
> > > io->name = "I/O";
> > > rockchip->io_size = resource_size(io);
> > > rockchip->io_bus_addr = io->start - win->offset;
> > > - err = pci_remap_iospace(io, io_base);
> > > - if (err) {
> > > - dev_warn(dev, "error %d: failed to map resource %pR\n",
> > > - err, io);
> > > - continue;
> > > - }
> > > rockchip->io = io;
> > > break;
> > > case IORESOURCE_MEM:
> > > @@ -1026,9 +1013,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> > > rockchip->mem_size = resource_size(mem);
> > > rockchip->mem_bus_addr = mem->start - win->offset;
> > > break;
> > > - case IORESOURCE_BUS:
> > > - rockchip->root_bus_nr = win->res->start;
> > > - break;
> > > default:
> > > continue;
> > > }
> > > @@ -1036,15 +1020,14 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> > >
> > > err = rockchip_pcie_cfg_atu(rockchip);
> > > if (err)
> > > - goto err_unmap_iospace;
> > > + goto err_remove_irq_domain;
> > >
> > > rockchip->msg_region = devm_ioremap(dev, rockchip->msg_bus_addr, SZ_1M);
> > > if (!rockchip->msg_region) {
> > > err = -ENOMEM;
> > > - goto err_unmap_iospace;
> > > + goto err_remove_irq_domain;
> > > }
> > >
> > > - list_splice_init(&res, &bridge->windows);
> > > bridge->dev.parent = dev;
> > > bridge->sysdata = rockchip;
> > > bridge->busnr = 0;
> > > @@ -1054,7 +1037,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> > >
> > > err = pci_scan_root_bus_bridge(bridge);
> > > if (err < 0)
> > > - goto err_unmap_iospace;
> > > + goto err_remove_irq_domain;
> > >
> > > bus = bridge->bus;
> > >
> > > @@ -1068,10 +1051,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> > > pci_bus_add_devices(bus);
> > > return 0;
> > >
> > > -err_unmap_iospace:
> > > - pci_unmap_iospace(rockchip->io);
> > > -err_free_res:
> > > - pci_free_resource_list(&res);
> > > err_remove_irq_domain:
> > > irq_domain_remove(rockchip->irq_domain);
> > > err_deinit_port:
> > > @@ -1097,7 +1076,6 @@ static int rockchip_pcie_remove(struct platform_device *pdev)
> > >
> > > pci_stop_root_bus(rockchip->root_bus);
> > > pci_remove_root_bus(rockchip->root_bus);
> > > - pci_unmap_iospace(rockchip->io);
> > > irq_domain_remove(rockchip->irq_domain);
> > >
> > > rockchip_pcie_deinit_phys(rockchip);
> > > --
> > > 2.20.1
> > >
> > >
> > > _______________________________________________
> > > Linux-mediatek mailing list
> > > Linux-mediatek@lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
linux-arm-kernel mailing list
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-12-06 14:59 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-28 16:32 [PATCH v3 00/25] PCI host resource consolidation Rob Herring
2019-10-28 16:32 ` [PATCH v3 01/25] resource: Add a resource_list_first_type helper Rob Herring
2019-10-28 16:32 ` [PATCH v3 02/25] PCI: Export pci_parse_request_of_pci_ranges() Rob Herring
2019-10-28 16:32 ` [PATCH v3 03/25] PCI: aardvark: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-28 16:32 ` [PATCH v3 04/25] PCI: altera: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 05/25] PCI: dwc: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 06/25] PCI: faraday: " Rob Herring
2019-11-03 19:12 ` Linus Walleij
2019-10-28 16:32 ` [PATCH v3 07/25] PCI: iproc: " Rob Herring
2019-10-29 15:58 ` Srinath Mannam
2019-10-29 17:09 ` Florian Fainelli
2019-10-28 16:32 ` [PATCH v3 08/25] PCI: mediatek: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 09/25] PCI: mobiveil: " Rob Herring
2019-10-29 9:00 ` Z.q. Hou
2019-10-28 16:32 ` [PATCH v3 10/25] PCI: rockchip: " Rob Herring
2019-12-05 17:56 ` Enric Balletbo Serra
2019-12-06 13:52 ` Lorenzo Pieralisi
2019-12-06 14:09 ` Lorenzo Pieralisi
2019-12-06 14:59 ` Enric Balletbo Serra [this message]
2019-10-28 16:32 ` [PATCH v3 11/25] PCI: rockchip: Drop storing driver private outbound resource data Rob Herring
2019-12-06 15:36 ` Lorenzo Pieralisi
2019-12-10 17:33 ` Enric Balletbo Serra
2019-12-11 9:39 ` Enric Balletbo Serra
2019-10-28 16:32 ` [PATCH v3 12/25] PCI: v3-semi: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-28 16:32 ` [PATCH v3 13/25] PCI: xgene: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 14/25] PCI: xilinx: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 15/25] PCI: xilinx-nwl: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 16/25] PCI: versatile: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 17/25] PCI: versatile: Remove usage of PHYS_OFFSET Rob Herring
2019-10-28 16:32 ` [PATCH v3 18/25] PCI: versatile: Enable COMPILE_TEST Rob Herring
2019-10-28 16:32 ` [PATCH v3 19/25] PCI: of: Add inbound resource parsing to helpers Rob Herring
2019-10-29 11:07 ` Lorenzo Pieralisi
2019-10-29 15:56 ` Srinath Mannam
2019-10-29 17:34 ` Lorenzo Pieralisi
2019-10-30 6:44 ` Srinath Mannam
2019-10-30 11:48 ` Lorenzo Pieralisi
2019-10-30 12:49 ` Robin Murphy
2019-10-30 14:56 ` Lorenzo Pieralisi
2019-10-30 22:18 ` Rob Herring
2019-10-31 10:09 ` Lorenzo Pieralisi
2019-10-29 22:12 ` Bjorn Helgaas
2019-10-28 16:32 ` [PATCH v3 20/25] PCI: ftpci100: Use inbound resources for setup Rob Herring
2019-10-28 16:32 ` [PATCH v3 21/25] PCI: v3-semi: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 22/25] PCI: xgene: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 23/25] PCI: iproc: " Rob Herring
2019-10-29 15:59 ` Srinath Mannam
2019-10-28 16:32 ` [PATCH v3 24/25] PCI: rcar: " Rob Herring
2019-10-28 16:32 ` [PATCH v3 25/25] PCI: Make devm_of_pci_get_host_bridge_resources() static Rob Herring
2019-10-31 10:57 ` [PATCH v3 00/25] PCI host resource consolidation Lorenzo Pieralisi
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