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To: Chen-Yu Tsai X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190910_095940_700563_B76E791C X-CRM114-Status: GOOD ( 12.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthias Brugger , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Thanks for the input guys. > > I think a shell is the minimum you should get to. > > So my take would be to send basic DTS (and clocks, if needed) so that you can > > boot into a shell, even using a initramfs. > > To expand on this, your basic DTS would likely include the CPU cores, an > interrupt controller (GIC?), a basic timer block (ARM arch timer?), the > UART(s), and a dummy clock for the UART(s). Fortunately the core stuff is pretty standard; arch timer, GIC and what seems to be a dw uart with one of the registers moved. Interrupts for the uart actually go through another interrupt controller that is wired to the GIC so I think in the first pass it would be polled. Based on your input I'm thinking a patch series that looks like this for the first pass: - patch to add arch/arm/mach-mstar and the bits in there - patch for just enough of a DTS to boot a buildroot initramfs up to a shell - patch for a basic defconfig Thanks, Daniel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel