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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=GUHy3tTXYEVlHWPOZt/B5s9dwh1oEap8QDDRaqRD42s=; b=lDObl/O0pPsODzDWijokO0gDJEOahEH86gioNq1UeaRJ5qdbL6lddtLwVutgXnYhZF LPqm/SxN+oyyjmCNTAU/6B5p7mQLwoSvIdDxJVFLapMi+r5KeZu2H3jGjh10YL24gEeu l8jSy4w9c35wKt3oL+JHGSpXDpIzCm/5850Uqrdi5lR/HrIgnDEW08XD2C4782fGs4FZ fCMrw9LX9pZ1CSeltRyH0K2v58/5WFo6roK1NLoLY4MoZMRpfS6Paj/8YtQdKKKXUU6q 7xKDgJN9CEkmkUziOgTtuDjP/0e7K3voDIE+7cycZUQyT8na2ikW5G9KsMuVHsxj48nE ymag== X-Gm-Message-State: ACgBeo1O2ZHuPOSaxGUfaY4twHpPIJbalZi+m9L5OXxzrZjGUiwDciES fg+z2ojLoaiZ6gaKK13Dg/qCDdA2nS3vsZvvm9aRug== X-Google-Smtp-Source: AA6agR7IHk6cdCdDMOwQoLbNgYeM+zGxAHtlj9Ps+Z38Lyz7NBVqyyguZjbICAsIreBFAhf/MXWHt+Mk9Zkk8gYuoS4= X-Received: by 2002:a25:1486:0:b0:6a8:f3e1:58ba with SMTP id 128-20020a251486000000b006a8f3e158bamr4883435ybu.80.1662596096986; Wed, 07 Sep 2022 17:14:56 -0700 (PDT) MIME-Version: 1.0 References: <20220803122655.100254-1-nipun.gupta@amd.com> <20220906134801.4079497-1-nipun.gupta@amd.com> <20220906134801.4079497-4-nipun.gupta@amd.com> <9e537066-525f-4a8c-ffc1-926ac130c6e6@arm.com> In-Reply-To: <9e537066-525f-4a8c-ffc1-926ac130c6e6@arm.com> From: Saravana Kannan Date: Wed, 7 Sep 2022 17:14:20 -0700 Message-ID: Subject: Re: [RFC PATCH v3 3/7] iommu/arm-smmu-v3: support ops registration for CDX bus To: Robin Murphy Cc: "Gupta, Nipun" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "gregkh@linuxfoundation.org" , "rafael@kernel.org" , "eric.auger@redhat.com" , "alex.williamson@redhat.com" , "cohuck@redhat.com" , "Gupta, Puneet (DCG-ENG)" , "song.bao.hua@hisilicon.com" , "mchehab+huawei@kernel.org" , "maz@kernel.org" , "f.fainelli@gmail.com" , "jeffrey.l.hugo@gmail.com" , "Michael.Srba@seznam.cz" , "mani@kernel.org" , "yishaih@nvidia.com" , "jgg@ziepe.ca" , "jgg@nvidia.com" , "will@kernel.org" , "joro@8bytes.org" , "masahiroy@kernel.org" , "ndesaulniers@google.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kbuild@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "kvm@vger.kernel.org" , "okaya@kernel.org" , "Anand, Harpreet" , "Agarwal, Nikhil" , "Simek, Michal" , "Radovanovic, Aleksandar" , "git (AMD-Xilinx)" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220907_171502_728562_2078B080 X-CRM114-Status: GOOD ( 33.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 7, 2022 at 1:40 PM Robin Murphy wrote: > > On 2022-09-07 19:24, Saravana Kannan wrote: > > On Wed, Sep 7, 2022 at 1:27 AM Robin Murphy wrote: > >> > >> On 2022-09-07 04:17, Gupta, Nipun wrote: > >>> [AMD Official Use Only - General] > >>> > >>> > >>> > >>>> -----Original Message----- > >>>> From: Saravana Kannan > >>>> Sent: Wednesday, September 7, 2022 5:41 AM > >>>> To: Gupta, Nipun > >>>> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > >>>> gregkh@linuxfoundation.org; rafael@kernel.org; eric.auger@redhat.com; > >>>> alex.williamson@redhat.com; cohuck@redhat.com; Gupta, Puneet (DCG-ENG) > >>>> ; song.bao.hua@hisilicon.com; > >>>> mchehab+huawei@kernel.org; maz@kernel.org; f.fainelli@gmail.com; > >>>> jeffrey.l.hugo@gmail.com; Michael.Srba@seznam.cz; mani@kernel.org; > >>>> yishaih@nvidia.com; jgg@ziepe.ca; jgg@nvidia.com; robin.murphy@arm.com; > >>>> will@kernel.org; joro@8bytes.org; masahiroy@kernel.org; > >>>> ndesaulniers@google.com; linux-arm-kernel@lists.infradead.org; linux- > >>>> kbuild@vger.kernel.org; linux-kernel@vger.kernel.org; > >>>> devicetree@vger.kernel.org; kvm@vger.kernel.org; okaya@kernel.org; Anand, > >>>> Harpreet ; Agarwal, Nikhil > >>>> ; Simek, Michal ; > >>>> Radovanovic, Aleksandar ; git (AMD-Xilinx) > >>>> > >>>> Subject: Re: [RFC PATCH v3 3/7] iommu/arm-smmu-v3: support ops registration > >>>> for CDX bus > >>>> > >>>> [CAUTION: External Email] > >>>> > >>>> On Tue, Sep 6, 2022 at 6:48 AM Nipun Gupta wrote: > >>>>> > >>>>> With new CDX bus supported for AMD FPGA devices on ARM > >>>>> platform, the bus requires registration for the SMMU v3 > >>>>> driver. > >>>>> > >>>>> Signed-off-by: Nipun Gupta > >>>>> --- > >>>>> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 ++++++++++++++-- > >>>>> 1 file changed, 14 insertions(+), 2 deletions(-) > >>>>> > >>>>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > >>>> b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > >>>>> index d32b02336411..8ec9f2baf12d 100644 > >>>>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > >>>>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > >>>>> @@ -29,6 +29,7 @@ > >>>>> #include > >>>>> > >>>>> #include > >>>>> +#include > >>>>> > >>>>> #include "arm-smmu-v3.h" > >>>>> #include "../../iommu-sva-lib.h" > >>>>> @@ -3690,16 +3691,27 @@ static int arm_smmu_set_bus_ops(struct > >>>> iommu_ops *ops) > >>>>> if (err) > >>>>> goto err_reset_pci_ops; > >>>>> } > >>>>> +#endif > >>>>> +#ifdef CONFIG_CDX_BUS > >>>>> + if (cdx_bus_type.iommu_ops != ops) { > >>>>> + err = bus_set_iommu(&cdx_bus_type, ops); > >>>>> + if (err) > >>>>> + goto err_reset_amba_ops; > >>>>> + } > >>>> > >>>> I'm not an expert on IOMMUs, so apologies if the question is stupid. > >>>> > >>>> Why does the CDX bus need special treatment here (like PCI) when there > >>>> are so many other busses (eg: I2C, SPI, etc) that don't need any > >>>> changes here? > >>> > >>> AFAIU, the devices on I2C/SPI does not use SMMU. Apart from PCI/AMBA, > >>> FSL-MC is another similar bus (on SMMUv2) which uses SMMU ops. > >>> > >>> The devices here are behind SMMU. Robin can kindly correct or add > >>> more here from SMMU perspective. > >> > >> Indeed, there is no need to describe and handle how DMA may or may not > >> be translated for I2C/SPI/USB/etc. because they are not DMA-capable > >> buses (in those cases the relevant bus *controller* often does DMA, but > >> it does that for itself as the platform/PCI/etc. device it is). > > > > Ok this is what I was guessing was the reason, but didn't want to make > > that assumption. > > > > So if there are other cases like AMBA, FSL-MC where the devices can do > > direct DMA, why do those buses not need a #ifdef section in this > > function like CDX? Or put another way, why does CDX need special treatment? > > Er, it doesn't? The only non-optional bus here is platform, since the > others *can* be configured out and *are* #ifdefed accordingly. Ah ok. Also I somehow missed the #ifdef AMBA there and thought there was only #ifdef PCI and the rest of the buses somehow got it working without having to muck around arm-smmu-v3.c. Thanks for the explanation. I'm done here :) -Saravana > This > patch is fine for the kernel it was based on, it'll just want rewriting > now that I've cleaned all this horrible driver boilerplate up. And > according to the thread on patch #4 there might need to be additional > changes for CDX to express a reserved MSI region for SMMU support to > actually work properly. > > Robin. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel