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Mon, 16 Dec 2019 05:42:44 -0800 (PST) X-Gm-Message-State: APjAAAXP9Ae2EgZAyNrKmeOPNAkhI1umDhSwwtPLHPBMDdZDTkUC54jk hQmsk9xKsX5No4NQsabmKqSAiY1X0Drfr0NDD8Y= X-Google-Smtp-Source: APXvYqxPODUBwPoRDFD7zdAeQAap8dbisfaU0qDmq581xzIb9kxHBDLrHbRDpofwtqywSNRWgqebLus37HOu3FGBw5s= X-Received: by 2002:a5d:6b88:: with SMTP id n8mr31556564wrx.288.1576503762492; Mon, 16 Dec 2019 05:42:42 -0800 (PST) MIME-Version: 1.0 References: <20191215165924.28314-1-wens@kernel.org> <20191215165924.28314-12-wens@kernel.org> <20191216133931.wliwn5woy3hstdg3@gilmour.lan> In-Reply-To: <20191216133931.wliwn5woy3hstdg3@gilmour.lan> From: Chen-Yu Tsai Date: Mon, 16 Dec 2019 21:42:30 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 11/14] ARM: dts: sun8i: r40: Add device node for CSI0 To: Maxime Ripard X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191216_054244_778595_5767FBE7 X-CRM114-Status: GOOD ( 20.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree , Chen-Yu Tsai , linux-kernel , Rob Herring , Sakari Ailus , Mauro Carvalho Chehab , linux-arm-kernel , Linux Media Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Dec 16, 2019 at 9:39 PM Maxime Ripard wrote: > > On Mon, Dec 16, 2019 at 12:59:21AM +0800, Chen-Yu Tsai wrote: > > From: Chen-Yu Tsai > > > > The CSI0 and CSI1 blocks are the same as found on the A20. However only > > CSI0 is supported upstream right now. > > > > Add a device node for CSI0 using the A20 compatible as a fallback, and > > the standard pinctrl options. Also add the MBUS interconnect. > > > > Signed-off-by: Chen-Yu Tsai > > --- > > arch/arm/boot/dts/sun8i-r40.dtsi | 36 ++++++++++++++++++++++++++++++++ > > 1 file changed, 36 insertions(+) > > > > diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi > > index 82ea0b5b0710..2d1e97cc4155 100644 > > --- a/arch/arm/boot/dts/sun8i-r40.dtsi > > +++ b/arch/arm/boot/dts/sun8i-r40.dtsi > > @@ -180,6 +180,20 @@ nmi_intc: interrupt-controller@1c00030 { > > interrupts = ; > > }; > > > > + csi0: csi@1c09000 { > > + compatible = "allwinner,sun8i-r40-csi0", > > + "allwinner,sun7i-a20-csi0"; > > + reg = <0x01c09000 0x1000>; > > + interrupts = ; > > + clocks = <&ccu CLK_BUS_CSI0>, <&ccu CLK_CSI_SCLK>, > > + <&ccu CLK_DRAM_CSI0>; > > + clock-names = "bus", "isp", "ram"; > > + resets = <&ccu RST_BUS_CSI0>; > > + interconnects = <&mbus 5>; > > + interconnect-names = "dma-mem"; > > + status = "disabled"; > > + }; > > + > > mmc0: mmc@1c0f000 { > > compatible = "allwinner,sun8i-r40-mmc", > > "allwinner,sun50i-a64-mmc"; > > @@ -355,6 +369,20 @@ clk_out_a_pin: clk-out-a-pin { > > function = "clk_out_a"; > > }; > > > > + /omit-if-no-ref/ > > + csi0_8bits_pins: csi0-8bits-pins { > > + pins = "PE0", "PE2", "PE3", "PE4", "PE5", > > + "PE6", "PE7", "PE8", "PE9", "PE10", > > + "PE11"; > > + function = "csi0"; > > + }; > > + > > + /omit-if-no-ref/ > > + csi0_mclk_pin: csi0-mclk-pin { > > + pins = "PE1"; > > + function = "csi0"; > > + }; > > + > > gmac_rgmii_pins: gmac-rgmii-pins { > > pins = "PA0", "PA1", "PA2", "PA3", > > "PA4", "PA5", "PA6", "PA7", > > @@ -624,6 +652,14 @@ gmac_mdio: mdio { > > }; > > }; > > > > + mbus: dram-controller@1c62000 { > > + compatible = "allwinner,sun8i-r40-mbus"; > > + reg = <0x01c62000 0x1000>; > > + clocks = <&ccu 155>; > > We should export the clock too? I meant to do it separately. Haven't gotten to it though. ChenYu _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel